파트넘버.co.kr X40021 데이터시트 PDF


X40021 반도체 회로 부품 판매점

(X40020 / X40021) Dual Voltage Monitor



Intersil Corporation 로고
Intersil Corporation
X40021 데이터시트, 핀배열, 회로
®
Data Sheet
X40020, X40021
May 17, 2006
FN8112.1
Dual Voltage Monitor with Integrated CPU
Supervisor and System Battery Switch
FEATURES
• Dual voltage detection and reset assertion
—Three standard reset threshold settings
(4.6V/2.9V, 4.6V/2.6V, 2.9V/1.6V)
VATdRjuIPs2t
programmable down to 0.9V
low voltage reset threshold voltages
using special programming sequence
MReosneittosrigtwnoalvvoalltiadgteosVoCrCd=et1eVct
power
fail
• Battery switch backup
FVaOuUlTt:d5emteActtioon50rmegAisftreorm VCC; 250µA from VBATT
• Selectable power-on reset timeout
(0.05s, 0.2s, 0.4s, 0.8s)
• Selectable watchdog timer interval
(25ms, 200ms, 1.4s, off)
• Debounced manual reset input
• Low power CMOS
—25µA typical standby current, watchdog on
—6µA typical standby current, watchdog off
—1µA battery current in backup mode
• 400kHz 2-wire interface
www.DataSheet4U.com 2.7V to 5.5V power supply operation
• Available packages
—14-lead SOIC, TSSOP
• Monitor voltages: 5V to 1.6V
• Memory security
• Pb-free plus anneal available (RoHS compliant)
APPLICATIONS
• Communications equipment
—Routers, hubs, switches
—Disk arrays
• Industrial systems
—Process control
—Intelligent instrumentation
• Computer systems
—Desktop computers
—Network servers
X40020, X40021
Standard VTRIP1 Level Standard VTRIP2, Level
4.6V (±1%)
2.9V(±1.7%)
4.6V (±1%)
2.6V (±2%)
2.9V(±1.7%)
1.6V (±3%)
See “Ordering Information” for more details
For Custom Settings, call Intersil.
Suffix
-A
-B
-C
DESCRIPTION
The X40020 combines power-on reset control, watch-
dog timer, supply voltage supervision, and secondary
supervision, and manual reset, in one package. This
combination lowers system cost, reduces board space
requirements, and increases reliability.
Applying voltage to VCC activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and system oscilla-
tor to stabilize before the processor can execute code.
BLOCK DIAGRAM
V2MON
SDA
WP
SCL
VCC
(V1MON)
BATT-ON
VOUT
VBATT
Data
Register
Command
Decode Test
& Control
Logic
System
Battery
Switch
V2LMogoincitor
VOUT
+
- VTRIP2
Fault Detection
Register
Status
Register
Watchdog
and
Reset Logic
VOUT
VCCLMogoicnitor
VOUT
+
VTRIP1
-
Power-on,
Manual Reset
Low Voltage
Reset
Generation
V2FAIL
WDO
MR
RESET
X40020
RESET
X40021
LOWLINE
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.


X40021 데이터시트, 핀배열, 회로
X40020, 40021
Ordering Information
PART
NUMBER*
WITH RESET
PART
MARKING
PART
NUMBER*
WITH RESET
MONITORED VTRIP1
PART
VCC RANGE
MARKING SUPPLIES (mV)
VTRIP2
RANGE
TEMP.
(mV) RANGE (°C)
PACKAGE
PKG.
DWG. #
X40020S14-C X40020S C X40021S14-C X40021S C 1.6 to 3.6 2.9 ±50 1.6 ±50 0 to 70 14 Ld SOIC (150 mil) MDP0027
X40020S14I-C X40020S IC X40021S14I-C X40021S IC
-40 to +85 14 Ld SOIC (150 mil) MDP0027
X40020V14-C X4002 0VC X40021V14-C X4002 1VC
0 to 70 14 Ld TSSOP
(4.4mm)
M14.173
X40020V14I-C X4002 0VIC X40021V14I-C X4002 1VIC
-40 to +85 14 Ld TSSOP
(4.4mm)
M14.173
X40020S14-B X40020S B X40021S14-B X40021S B 2.6 to 5.5 4.6 ±50 2.6 ±50 0 to 70 14 Ld SOIC (150 mil) MDP0027
X40020S14Z-B X40020S ZB X40021S14Z-B X40021S ZB
(Note)
(Note)
0 to 70 14 Ld SOIC (150 mil) MDP0027
(Pb-free)
X40020S14I-B X40020S IB X40021S14I-B X40021S IB
-40 to +85 14 Ld SOIC (150 mil) MDP0027
X40020S14IZ-B X40020S ZIB X40021S14IZ-B X40021S ZIB
(Note)
(Note)
-40 to +85 14 Ld SOIC (150 mil) MDP0027
(Pb-free)
X40020V14-B X4002 0VB X40021V14-B X4002 1VB
0 to 70 14 Ld TSSOP
(4.4mm)
M14.173
X40020V14Z-B X4002 0VZB X40021V14Z-B X4002 1VZB
(Note)
(Note)
0 to 70 14 Ld TSSOP
M14.173
(4.4mm) (Pb-free)
X40020V14I-B X4002 0VIB X40021V14I-B X4002 1VIB
-40 to +85 14 Ld TSSOP
(4.4mm)
M14.173
X40020V14IZ-B X4002 0VZIB X40021V14IZ-B X4002 1VZIB
(Note)
(Note)
-40 to +85 14 Ld TSSOP
M14.173
(4.4mm) (Pb-free)
X40020S14-A X40020S A X40021S14-A X40021S A 2.9 to 5.5
2.9 ±50 0 to 70 14 Ld SOIC (150 mil) MDP0027
X40020S14Z-A X40020S ZA X40021S14Z-A X40021S ZA
(Note)
(Note)
0 to 70 14 Ld SOIC (150 mil) MDP0027
(Pb-free)
X40020S14I-A X40020S IA X40021S14I-A X40021S IA
-40 to +85 14 Ld SOIC (150 mil) MDP0027
X40020S14IZ-A X40020S ZIA X40021S14IZ-A X40021S ZIA
(Note)
(Note)
-40 to +85 14 Ld SOIC (150 mil) MDP0027
(Pb-free)
X40020V14-A X4002 0VA X40021V14-A X4002 1VA
0 to 70 14 Ld TSSOP
(4.4mm)
M14.173
X40020V14Z-A X4002 0VZA X40021V14Z-A X4002 1VZA
(Note)
(Note)
0 to 70 14 Ld TSSOP
M14.173
(4.4mm) (Pb-free)
X40020V14I-A X4002 0VIA X40021V14I-A X4002 1VIA
-40 to +85 14 Ld TSSOP
(4.4mm)
M14.173
X40020V14IZ-A X4002 0VZIA X40021V14IZ-A X4002 1VZIA
(Note)
(Note)
-40 to +85 14 Ld TSSOP
M14.173
(4.4mm) (Pb-free)
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2 FN8112.1
May 17, 2006




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