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FIN24C 반도체 회로 부품 판매점

uSerDes Low Voltage 24-Bit Bi-Directional Serializer/Deserializer



Fairchild Semiconductor 로고
Fairchild Semiconductor
FIN24C 데이터시트, 핀배열, 회로
April 2005
Revised September 2005
FIN24C
PSerDes¥
Low Voltage 24-Bit Bi-Directional Serializer/Deserializer
General Description
Features
The FIN24C PSerDes¥ is a low power Serializer/Deserializer O Low power for minimum impact on battery life
(SerDes) that can help minimize the cost and power of transfer-
• Multiple power-down modes
ring wide signal paths. Through the use of serialization, the
• AC coupling with DC balance
number of signals transferred from one point to another can be
significantly reduced. Typical reduction is 4:1 to 6:1 for unidirec-
tional paths. For bi-directional operation, using half duplex for
multiple sources, it is possible to increase the signal reduction
O 100nA in standby mode
5mA typical operating conditions
O Cable reduction: 25:4 or greater
to close to 10:1. Through the use of differential signaling, shield-
ing and EMI filters can also be minimized, further reducing the
cost of serialization. The differential signaling is also important
O Bi-directional operation 50:7 reduction or greater
O Up to 24 bits in either direction
for providing a noise-insensitive signal that can withstand radio
and electrical noise sources. Major reduction in power con-
sumption allows minimal impact on battery life in ultra-portable
O Up to 20MHz parallel interface operation
O Voltage translation from 1.8V to 3.3V
applications. A unique word boundary technique assures that
the actual word boundary is identified when the data is deserial-
ized. This guarantees that each word is correctly aligned at the
O Ultra-small and cost-effective packaging
O High ESD protection: !8kV HBM
deserializer on a word by word basis through a unique
sequence of clock and data that is not repeated except at the Applications
Oword boundary. It is possible to use a single PLL for most awpwpw.lDi-ataSheet4U.com
cations including bi-directional operation.
Micro-controller or Pixel interfaces
O Image sensors
O Small displays
LCD, cell phone, digital camera, portable gaming, printer,
PDA, video camera, automotive
Ordering Code:
Order
Number
FIN24CGFX
(Preliminary)
FIN24CMLX
Package
Number
BGA042A
Package Description
Pb-Free 42-Ball Ultra Small Scale Ball Grid Array (USS-BGA), JEDEC MO-195, 3.5mm Wide
MLP040A Pb-Free 40-Terminal Molded Leadless Package (MLP), Quad, JEDEC MO-220, 6mm Square
Pb-Free package per JEDEC J-STD-020B.
BGA and MLP packages available in Tape and Reel only.
PSerDes¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500909
www.fairchildsemi.com


FIN24C 데이터시트, 핀배열, 회로
Functional Block Diagram
Connection Diagrams
Terminal Assignments for MLP
Terminal Assignments for PBGA
(Top View)
(Top View)
www.fairchildsemi.com
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FIN24C data

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