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PDF PM100RLA120 Data sheet ( Hoja de datos )
| Número de pieza | PM100RLA120 | |
| Descripción | INTELLIGENT POWER MODULES FLAT-BASE TYPE INSULATED PACKAGE | |
| Fabricantes | Mitsubishi Electric | |
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MITSUBISHI <INTELLIGENT POWER MODULES>
PM100RLA120
FLAT-BASE TYPE
INSULATED PACKAGE
PM100RLA120
FEATURE
a) Adopting new 5th generation IGBT (CSTBT) chip, which
performance is improved by 1µm fine rule process.
For example, typical Vce(sat)=1.9V @Tj=125°C
b) I adopt the over-temperature conservation by Tj detection of
CSTBT chip, and error output is possible from all each con-
servation upper and lower arm of IPM.
c) Current rating of brake part increased.
50% for the current rating of inverter part.
• 3φ 100A, 1200V Current-sense IGBT type inverter
• 50A, 1200V Current-sense regenerative brake IGBT
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, short-
circuit, over-temperature & under-voltage (P-Fo available
from upper arm devices)
• Acoustic noise-less 18.5kW/22kW class inverter application
• UL Recognized Yellow Card No.E80276(N)
File No.E80271
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
6.05
6-M5 Nuts
135
110±0.5
26 26
10.5 10.5 10.5
40.5
W VU
6.05
11.7
13
6
Dimensions in mm
13(Screwing Depth)
71.5
66.5
3.25 6-2 10 3-2 10 3-2 10 3-2 3.25
4-φ5.5
Mounting Holes
2-φ2.5
19 13
9
5
19- 0.5
1
30.15
11
LABEL
4
Terminal code
1. VUPC 6. VFO
2. UFO 7. VP
3. UP 8. VVP1
4. VUP1 9. VWPC
5. VVPC 10. WFO
11. WP 16. UN
12. VWP1 17. VN
13. VNC 18. WN
14. VN1 19. Fo
15. Br
Jan. 2005
1 page  
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100RLA120
FLAT-BASE TYPE
INSULATED PACKAGE
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-
lowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W,B)
VCIN
(0V)
IN
Fo
V Ic
VD (all) U,V,W, (N)
Fig. 1 VCE(sat) Test
a) Lower Arm Switching
VCIN
(15V)
Signal input
(Upper Arm)
Fo
Signal input Fo
VCIN (Lower Arm)
P
U,V,W
CS
b) Upper Arm Switching VD (all)
Fo
VCIN Signal input
(Upper Arm)
VCIN
(15V)
Signal input
(Lower Arm)
Fo
N
Ic
P
U,V,W
CS
N
VD (all)
Ic
Fig. 3 Switching time and SC test circuit
P, (U,V,W)
VCIN
(15V)
IN
Fo
V –Ic
VD (all) U,V,W,B, (N)
Fig. 2 VEC, (VFM) Test
trr
Irr
Ic
VCE
Vcc
90%
90%
10%
10%
10%
tc(on)
tc(off)
VCIN
Vcc td(on)
tr
td(off)
10%
tf
(ton= td(on) + tr)
(toff= td(off) + tf)
Fig. 4 Switching time test waveform
VCIN
(15V)
P, (U,V,W,B)
A
IN
Fo Pulse VCE
U,V,W, (N)
VD (all)
Fig. 5 ICES Test
VCIN
Ic
Short Circuit Current
Constant Current
SC
Fo
toff(SC)
Fig. 6 SC test waveform
IPM’ input signal VCIN
(Upper Arm)
0V
IPM’ input signal VCIN
(Lower Arm)
0V
1.5V
2V
tdead
2V
1.5V
tdead
1.5V
2V
tdead
t
t
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
Fig. 7 Dead time measurement point example
Jan. 2005
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet PM100RLA120.PDF ] | |
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