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PDF K9F1208R0C Data sheet ( Hoja de datos )

Número de pieza K9F1208R0C
Descripción FLASH MEMORY
Fabricantes Samsung semiconductor　
Logotipo Samsung semiconductor Logotipo



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K9F1208U0C
K9F1208R0C K9F1208B0C
FLASH MEMORY
K9F1208X0C
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
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K9F1208R0C pdf
K9F1208U0C
K9F1208R0C K9F1208B0C
PIN CONFIGURATION (FBGA)
K9F1208X0C-JCB0/JIB0
12 3 4 5 6
N.C N.C
N.C N.C
A N.C
B
C
D
E
F
G
H
N.C N.C
/WP ALE Vss /CE /WE R/B
NC /RE CLE NC NC NC
NC NC NC NC NC NC
NC NC NC NC NC NC
NC NC NC NC NC NC
NC I/O0 NC NC NC Vcc
NC I/O1 NC VccQ I/O5 I/O7
Vss I/O2 I/O3 I/O4 I/O6 Vss
N.C N.C
N.C N.C
N.C N.C
N.C N.C
Top View
FLASH MEMORY
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K9F1208R0C arduino
K9F1208U0C
K9F1208R0C K9F1208B0C
FLASH MEMORY
VALID BLOCK
Parameter
Valid Block Number
Symbol
NVB
Min
4,026
Typ.
-
Max
4,096
Unit
Blocks
NOTE :
1. The K9F1208X0C may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks
is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits. Do not erase or
program factory-marked bad blocks. Refer to the attached technical notes for a appropriate management of invalid blocks.
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block up to 1K program/erase cycles with 1bit/512Byte ECC.
3. Minimum 1,004 valid blocks are guaranteed for each contiguous 128Mb memory space.
AC TEST CONDITION
(K9F1208X0C-XCB0 :TA=0 to 70°C, K9F1208X0C-XIB0:TA=-40 to 85°C).
Parameter
K9F1208R0C
Value
K9F1208B0C
K9F1208U0C
Input Pulse Levels
0V to VCC
0V to Vcc
0.4V to 2.4V
Input Rise and Fall Times
5ns 5ns 5ns
Input and Output Timing Levels
VCC/2
Vcc/2
1.5V
K9F1208R0C:Output Load (Vcc:1.8V +/-10%)
K9F1208B0C:Output Load (Vcc:2.7V +/-10%) 1 TTL GATE and CL=30pF 1 TTL GATE and CL=30pF
K9F1208U0C:Output Load (Vcc:3.3V +/-10%)
1 TTL GATE and
CL=100pF
K9F1208U0C:Output Load (Vcc:3.0V +/-10%)
-
- 1 TTL GATE and CL=50pF
CAPACITANCE(TA=25°C, VCC=1.8V/2.7V/3.3V, f=1.0MHz)
Item
Input/Output Capacitance
Input Capacitance
Symbol
CI/O
CIN
Test Condition
VIL=0V
VIN=0V
NOTE : Capacitance is periodically sampled and not 100% tested.
Min
-
-
Max
10
10
MODE SELECTION
CLE ALE
CE
WE
RE
WP
Mode
HL L
LHL
HX
Command Input
Read Mode
HX
Address Input (4 clocks)
HL L
LHL
HH
Command Input
Write Mode
HH
Address Input (4 clocks)
LLL
H H Data Input
LLLH
X Data Output
L L L H H X During Read (Busy)
X X X X X H During Program (Busy)
X X X X X H During Erase (Busy)
X X(1) X X X L Write Protect
X X H X X 0V/VCC(2) Stand-by
NOTE : 1. X can be VIL or VIH.
2. WP should be biased to CMOS high or CMOS low for standby.
Unit
pF
pF
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