파트넘버.co.kr VN0635 데이터시트 PDF


VN0635 반도체 회로 부품 판매점

(VN0635 / VN0640) N-Channel Enhancement-Mode Vertical DMOS FETs



Supertex 로고
Supertex
VN0635 데이터시트, 핀배열, 회로
www.DataSheet4U.com
VN0635
VN0640
N-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BVDSS /
BVDGS
350V
400V
MIL visual screening available
RDS(ON)
(max)
10
10
Features
s Free from secondary breakdown
s Low power drive requirement
s Ease of paralleling
s Low CISS and fast switching speeds
s Excellent thermal stability
s Integral Source-Drain diode
s High input impedance and high gain
s Complementary N- and P-channel devices
ID(ON)
(min)
0.75A
0.75A
Applications
s Motor controls
s Converters
s Amplifiers
s Switches
s Power supply circuits
s Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
BVDSS
BVDGS
± 20V
-55°C to +150°C
300°C
Order Number / Package
TO-92
Die
VN0635N3 VN0635ND
VN0640N3 VN0640ND
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Package Options
SGD
TO-92
Note: See Package Outline section for dimensions.
7-171


VN0635 데이터시트, 핀배열, 회로
Thermal Characteristics
Package
ID (continuous)*
ID (pulsed)
TO-92
0.25A
* ID (continuous) is limited by max rated Tj.
1.5A
Power Dissipation
@ TC = 25°C
1W
θjc
°C/W
125
θja
°C/W
170
VN0635/VN0640
IDR*
0.25A
IDRM
1.5A
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol
BVDSS
VGS(th)
VGS(th)
IGSS
IDSS
Parameter
Min Typ Max
Drain-to-Source
Breakdown Voltage
VN0640 400
VN0635 350
Gate Threshold Voltage
1.0 4.0
Change in VGS(th) with Temperature
Gate Body Leakage
-4.0
100
Zero Gate Voltage Drain Current
10
1
ID(ON)
ON-State Drain Current
0.6
0.75
RDS(ON)
Static Drain-to-Source
ON-State Resistance
8.0
8.0 10
RDS(ON)
Change in RDS(ON) with Temperature
0.75
GFS Forward Transconductance
100 160
CISS Input Capacitance
105 130
COSS
Common Source Output Capacitance
25 75
CRSS
Reverse Transfer Capacitance
10 20
td(ON)
Turn-ON Delay Time
10
tr Rise Time
10
td(OFF)
Turn-OFF Delay Time
20
tf Fall Time
10
VSD Diode Forward Voltage Drop
1.8
trr Reverse Recovery Time
300
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Unit
V
V
mV/°C
nA
µA
mA
A
%/°C
m
pF
ns
V
ns
Conditions
VGS = 0V, ID = 2mA
VGS = VDS , ID = 2mA
VGS = VDS , ID = 2mA
VGS = ±20V, VDS = 0V
VGS = 0V, VDS = Max Rating
VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
VGS = 5V, VDS = 25V
VGS = 10V, VDS = 25V
VGS = 5V, ID = 100mA
VGS = 10V, ID = 500mA
VGS = 10V, ID = 500mA
VDS = 25V, ID = 500mA
VGS = 0V, VDS = 25V
f = 1 MHz
VDD = 25V,
ID = 0.5A,
RGEN = 25
VGS = 0V, ISD = 0.5A
VGS = 0V, ISD = 0.5A
Switching Waveforms and Test Circuit
10V
INPUT
0V
10%
VDD
OUTPUT
0V
t(ON)
td(ON)
tr
10%
90%
90%
t(OFF)
td(OFF)
tF
10%
90%
PULSE
GENERATOR
Rgen
INPUT
VDD
RL
OUTPUT
D.U.T.
7-172




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VN0635

(VN0635 / VN0640) N-Channel Enhancement-Mode Vertical DMOS FETs - Supertex