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PDF KL5KUSB108 Data sheet ( Hoja de datos )
| Número de pieza | KL5KUSB108 | |
| Descripción | USB to 2 Serial / 1 Parallel | |
| Fabricantes | Kawasaki | |
| Logotipo |  |
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KL5KUSB108
Description
USB to 2 Serial / 1 Parallel
The Kawasaki USB to 2 Serial / 1 Parallel enables your system to have the capability to communicate
between the USB (Universal Serial Bus) port and 2 serial ports and 1 parallel port. This device meets the
USB 1.0/1.1 and IEEE1284 specifications. All the advantages of USB are available to peripherals with
parallel and serial port interface. With Kawasaki’s USB to 2 Serial / 1 Parallel device and software, it is
transparent to the peripheral and no firmware changes are required which makes it possible to convert
peripherals with serial and parallel interfaces to USB interface with minimum modifications. This device is
ideal for legacy compatibility solutions.
Features
• Advanced 16 Bit processor for USB transaction • 2 serial ports
processing and control data processing
• 230kbps baud rate
• Compliant with the USB 1.0/1.1 (Universal
• 128 byte FIFO
Serial Bus)
• Serial EEPROM interface
• Plug and Play compatible
• Utilizes low cost external crystal circuitry
• Compliant with USB printer device class
• 8K x 16 internal RAM buffer for fast
specification
communications
• IEEE1284 compliant including EPP and ECP • Debug UART for debug and code development
modes
• PC parallel port register-based standard
operation
• 5V tolerate Centronics inputs pins.
• USB host device drivers available
• Single-chip solution in a 100 pin LQFP
• Multiple logical channels support
Block Diagram
USB
Interface
VP
VM Serial
Interface
Engine
X2
Txd
CLK
Rxd
PLL & Clock
Generator
Debug
UART
Watchdog
Timer
Timer 1
Timer 0
16 Bit
Processor
16 Bit Address / Data Bus
RAM
(16KB)
Mask
ROM
EEPROM
Serial
Interface
SCL SDA
Channel 2
Channel 1
Serial
Interface
Serial
ports
IEEE1284
port
DTR
RTS
DCD
DSR
CTS
RI
Txd
Rxd
Ver. 1.2
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
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1 page  
KL5KUSB108
USB to 2 Serial / 1 Parallel
Pin #
I/O
Pin Name
Description
LQFP
93 IN/OUT
XD_10*
External Memory Data Pin
94 IN/OUT
XD_11*
External Memory Data Pin
95 IN/OUT
XD_12*
External Memory Data Pin
96 IN/OUT
XD_13*
External Memory Data Pin
97
GND
GND
98 IN/OUT
XD_14*
External Memory Data Pin
99 IN/OUT
XD_15*
External Memory Data Pin
100
VDD
VDD
Note 1: Pins with * are 5V tolerant.
Note 2: If application does not require some pins, then tie all unused imput pins to GND and make all
unused output and bi-directional pins open.
Function Description
16 Bit Processor
The integrated 16-bit processor serves as a micro controller for USB peripherals. The processor
can execute approximately five million instructions per second. With this processing power it
allows the design of intelligent peripherals that can process data prior to passing it on to the host
PC, thus improving overall performance of the system. The masked ROM in the this device or
external memory contains a specialized instruction set that has been designed for highly efficient
coding of processing algorithms and USB transaction processing.
The 16-bit processor is designed for efficient data execution by having direct access to the RAM
buffer, external memory, I/O interfaces, and all the control and status registers
The processor supports prioritized vectored hardware interrupts and has as many as 240
software interrupt vectors.
The processor provides six addressing modes, supporting memory-to-memory, memory-to-
register, register-to-register, immediate-to-register or immediate-to-memory operations. Register,
direct, immediate, indirect, and indirect indexed addressing modes are supported. In addition,
there is an auto-increment mode in which a register, used as an address pointer is automatically
incremented after each use, making repetitive operations more efficient both from a programming
and a performance standpoint.
The processor features a full set of program control, logical, and integer arithmetic instructions.
All instructions are sixteen bits wide, although some instructions require operands, which may
occupy another one or two words. Several special “ short immediate” instructions are available,
so that certain frequently used operations with small constant operand will fit into a 16-bit
instruction.
The Processor – Divide/Multiply function
The processor’s divide/multiply function contains all the instructions of the base processor that
additionally includes integer divide and multiply instructions. A signed multiply instruction takes
Ver. 1.2
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet KL5KUSB108.PDF ] | |
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