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NID5004N 반도체 회로 부품 판매점

Self-Protected FET



ON Semiconductor 로고
ON Semiconductor
NID5004N 데이터시트, 핀배열, 회로
www.DataSheet4U.com
NID5004N
Self−Protected FET
with Temperature and
Current Limit
40 V, 6.5 A, Single NChannel, DPAK
Self–protected FETs are a series of power MOSFETs which utilize
ON Semiconductor HDPlust technology. The self–protected
MOSFET incorporates protection features such as integrated thermal
and current limits. The selfprotected MOSFETs include an integrated
DraintoGate Clamp that provides overvoltage protection from
transients and avalanche. The device is protected from Electrostatic
Discharge (ESD) by utilizing an integrated GatetoSource Clamp.
Features
Short Circuit Protection
In Rush Current Limit
Thermal Shutdown with Automatic Restart
Avalanche Rated
Overvoltage Protection
ESD Protection (4 kV HBM)
Controlled Slew Rate for Low Noise Switching
AEC Q101 Qualified
This is a PbFree Device
Applications
Solenoid Driver
Relay Driver
Small Motors
Lighting
Relay Replacement
Load Switching
http://onsemi.com
VDSS
(Clamped)
40 V
RDS(on) Typ
110 mW @ 10 V
ID Typ
(Limited)
6.5 A
Drain
Gate
Input
Overvoltage
RG Protection
ESD Protection
Temperature Current Current
Limit
Limit
Sense
DPAK
CASE 369C
STYLE 2
Source
MARKING
DIAGRAM
1 YYW
2 D5
3 004NG
D5004N = Device Code
Y = Year
WW = Work Week
G = PbFree Device
1 = Gate
2 = Drain
3 = Source
ORDERING INFORMATION
Device
Package
Shipping
NID5004NT4G
DPAK 2500/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
April, 2006 Rev. 1
1
Publication Order Number:
NID5004N/D


NID5004N 데이터시트, 핀배열, 회로
NID5004N
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
DraintoSource Voltage Internally Clamped
GatetoSource Voltage
Drain Current
Total Power Dissipation
@ TA = 25°C (Note 1)
@ TA = 25°C (Note 2)
Continuous
VDSS
VGS
ID
PD
44 Vdc
"14
Vdc
Internally Limited
W
1.3
2.5
Thermal Resistance
JunctiontoCase
JunctiontoAmbient (Note 1)
JunctiontoAmbient (Note 2)
°C/W
RRRqqqJJJCAA
3.0
95
50
Single Pulse DraintoSource Avalanche Energy
(VDD = 30 Vdc, VGS = 5.0 Vdc,
IL = 1.8 Apk, L = 160 mH, RG = 25 W) (Note 3)
EAS 273
mJ
Operating and Storage Temperature Range (Note 4)
TJ, Tstg
55 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Surface mounted onto minimum pad size (100 sq/mm) FR4 PCB, 1 oz cu.
2. Mounted onto 1square pad size (700 sq/mm) FR4 PCB, 1 oz cu.
3. Not subject to Production Test
4. Normal prefault operating range. See thermal limit range conditions.
http://onsemi.com
2




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Self-Protected FET - ON Semiconductor