NB3N502 반도체 회로 부품 판매점
14 MHz to 190 MHz PLL Clock Multiplier
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NB3N502
14 MHz to 190 MHz PLL
Clock Multiplier
Description
The NB3N502 is a clock multiplier device that generates a low jitter,
TTL/CMOS level output clock which is a precise multiple of the
external input reference clock signal source. The device is a cost
efficient replacement for the crystal oscillators commonly used in
electronic systems. It accepts a standard fundamental mode crystal or
an external reference clock signal. Phase−Locked−Loop (PLL) design
techniques are used to produce an output clock up to 190 MHz with a
50% duty cycle. The NB3N502 can be programmed via two select
inputs (S0, S1) to provide an output clock (CLKOUT) at one of six
different multiples of the input frequency source, and at the same time
output the input aligned reference clock signal (REF).
Features
• Clock Output Frequency up to 190 MHz
• Operating Range: VDD = 3 V to 5.5 V
• Low Jitter Output of 15 ps One Sigma (rms)
• Zero ppm Clock Multiplication Error
• 45% − 55% Duty Cycle
• 25 mA TTL−level Drive Outputs
• Crystal Reference Input Range of 5 − 27 MHz
• Input Clock Frequency Range of 2 − 50 MHz
• Available in 8−pin SOIC Package or in Die Form
• Full Industrial Temperature Range −40°C to 85°C
• These are Pb−Free Devices
VDD
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAM
8
3N502
ALYW
G
1
3N502 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
NB3N502DG
SOIC−8
(Pb−Free)
98 Units / Rail
NB3N502DR2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
X1/CLK
X2
Reference
Clock
Crystal
Oscillator
Multiplier
Select
÷P
S1 S0
GND
Phase
Detector
Charge
Pump
VCO
÷ M Feedback
Figure 1. NB3N502 Logic Diagram
TTL/
CMOS
Output
TTL/
CMOS
Output
REF
CLKOUT
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 1
1
Publication Order Number:
NB3N502/D
NB3N502
X1/CLK 1
VDD 2
GND 3
REF 4
8 X2
7 S1
6 S0
5 CLKOUT
Figure 2. Pin Configuration (Top View)
Table 1. CLOCK MULTIPLIER SELECT TABLE
S1*
S0**
Multiplier
L L 2X
L H 5X
M L 3X
M H 3.33X
H L 4X
H H 2.5X
L = GND
H = VDD
M = OPEN (unconnected)
* Pin S1 defaults to M when left open
** Pin S0 defaults to H when left open
Table 2. OUTPUT FREQUENCY EXAMPLES
Output Frequency (MHz)
20 25 33.3 48 50 54 64 66.66 75 100 108 120 135
Input Frequency (MHz)
10 10 10 16 20 13.5 16 20 15 20 27 24 27
S1, S0
0 ,0 1, 1 M, 1 M, 0 1, 1 1, 0 1, 0 M, 1 0, 1 0, 1 1, 0 0, 1 0, 1
Table 3. PIN DESCRIPTION
Pin #
Name
I/O
1 X1/CLK
Input
2 VDD
3 GND
Power Supply
Power Supply
4
REF
CMOS/TTL Output
5
CLKOUT
CMOS/TTL Output
6 S0 CMOS/TTL Input
7 S1 Three−level Input
8 X2
Crystal Input
Description
Crystal or External Reference Clock Input
Positive Supply Voltage (3 V to 5.5 V)
0 V Ground.
Buffered Crystal Oscillator Clock Output
Clock Output
Multiplier Select Pin − Connect to VDD or GND. Internal Pull−up Resistor.
Multiplier Select Pin − Connect to VDD, GND or Float to M.
Crystal Input − Do Not Connect when Providing an External Clock Reference
Table 4. ATTRIBUTES
Characteristic
Value
ESD Protection
Human Body Model
Machine Model
> 8 kV
> 600 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
6700 Devices
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
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국내 전력반도체 판매점
상호 : 아이지 인터내셔날
전화번호 : 051-319-2877
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IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈
( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )
전력반도체 문의 : 010-3582-2743
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