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ADV7343 반도체 회로 부품 판매점

(ADV7342 / ADV7343) Multiformat Video Encoder



Analog Devices 로고
Analog Devices
ADV7343 데이터시트, 핀배열, 회로
Data Sheet
FEATURES
74.25 MHz 16-/24-bit high definition input support
Compliant with SMPTE 274M (1080i), 296M (720p),
and 240M (1035i)
Six 11-bit, 297 MHz video DACs
16× (216 MHz) DAC oversampling for SD
8× (216 MHz) DAC oversampling for ED
4× (297 MHz) DAC oversampling for HD
37 mA maximum DAC output current
NTSC M, PAL B/D/G/H/I/M/N, PAL 60 support
NTSC and PAL square pixel operation (24.54 MHz/29.5 MHz)
Multiformat video input support
4:2:2 YCrCb (SD, ED, and HD), 4:4:4 YCrCb (ED and HD), and
4:4:4 RGB (SD, ED, and HD)
Multiformat video output support
Composite (CVBS) and S-Video (Y-C)
Component YPrPb (SD, ED, and HD)
Component RGB (SD, ED, and HD)
Macrovision Rev 7.1.L1 (SD) and Rev 1.2 (ED) compliant
Simultaneous SD and ED/HD operation
EIA/CEA-861B compliance support
Copy generation management system (CGMS)
Closed captioning and wide screen signaling (WSS)
Integrated subcarrier locking to external video source
Complete on-chip video timing generator
On-chip test pattern generation
On-board voltage reference (optional external input)
Programmable features
Luma and chroma filter responses
Vertical blanking interval (VBI)
Subcarrier frequency (FSC) and phase
Luma delay
High definition (HD) programmable features
(720p/1080i/1035i)
4× oversampling (297 MHz)
Internal test pattern generator
Fully programmable YCrCb to RGB matrix
Gamma correction
Programmable adaptive filter control
Programmable sharpness filter control
CGMS (720p/1080i) and CGMS Type B (720p/1080i)
Undershoot limiter
Dual data rate (DDR) input support
Multiformat Video Encoder
Six, 11-Bit, 297 MHz DACs
ADV7342/ADV7343
Enhanced definition(ED) programmable features
(525p/625p)
8× oversampling (216 MHz output)
Internal test pattern generator
Black bar, hatch, flat field/frame
Individual Y and PrPb output delay
Gamma correction
Programmable adaptive filter control
Fully programmable YCrCb to RGB matrix
Undershoot limiter
Macrovision Rev 1.2 (525p/625p) (ADV7342 only)
CGMS (525p/625p) and CGMS Type B (525p)
Dual data rate (DDR) input support
Standard definition (SD) programmable features
16× oversampling (216 MHz)
Internal test pattern generator
Color and black bar
Controlled edge rates for start and end of active video
Individual Y and PrPb output delay
Undershoot limiter
Gamma correction
Digital noise reduction (DNR)
Multiple chroma and luma filters
Luma-SSAF filter with programmable gain/attenuation
PrPb SSAF
Separate pedestal control on component and
composite/S-Video output
VCR FF/RW sync mode
Macrovision Rev 7.1.L1 (ADV7342 only)
Copy generation management system (CGMS)
Wide screen signaling
Closed captioning
Serial MPU interface with I2C compatibility
3.3 V analog operation, 1.8 V digital operation, and 1.8 V or
3.3 V I/O operation
Temperature range: −40°C to +85°C
Qualified for automotive applications
APPLICATIONS
DVD recorders and players
High definition Blu-ray DVD players
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com


ADV7343 데이터시트, 핀배열, 회로
ADV7342/ADV7343
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Revision History ............................................................................... 4
General Description ......................................................................... 5
Functional Block Diagram .............................................................. 6
Specifications..................................................................................... 7
Power Supply and Voltage Specifications.................................. 7
Voltage Reference Specifications ................................................ 7
Input Clock Specifications .......................................................... 7
Analog Output Specifications ..................................................... 8
Digital Input/Output Specifications—3.3 V ............................. 8
Digital Input/Output Specifications—1.8 V ............................. 8
Digital Timing Specifications—3.3 V ........................................ 9
Digital Timing Specifications—1.8 V ...................................... 10
MPU Port Timing Specifications ............................................. 11
Power Specifications .................................................................. 11
Video Performance Specifications ........................................... 12
Timing Diagrams............................................................................ 13
Absolute Maximum Ratings.......................................................... 20
Thermal Resistance .................................................................... 20
ESD Caution................................................................................ 20
Pin Configuration and Function Descriptions........................... 21
Typical Performance Characteristics ........................................... 23
MPU Port Description................................................................... 28
I2C Operation.............................................................................. 28
Register Map Access....................................................................... 30
Register Programming............................................................... 30
Subaddress Register (SR7 to SR0) ............................................ 30
Input Configuration ....................................................................... 48
Standard Definition Only.......................................................... 48
Enhanced Definition/High Definition Only .......................... 49
Simultaneous Standard Definition and Enhanced
Definition/High Definition....................................................... 49
Enhanced Definition Only (at 54 MHz) ................................. 50
Output Configuration .................................................................... 51
Design Features............................................................................... 52
Output Oversampling ................................................................ 52
HD Interlace External P_HSYNC and P_VSYNC
Considerations ............................................................................ 53
ED/HD Timing Reset ................................................................ 53
SD Subcarrier Frequency Lock................................................. 53
SD VCR FF/RW Sync ................................................................ 54
Vertical Blanking Interval ......................................................... 54
SD Subcarrier Frequency Control............................................ 54
SD Noninterlaced Mode............................................................ 54
SD Square Pixel Mode ............................................................... 55
Filters............................................................................................ 56
ED/HD Test Pattern Color Controls ....................................... 57
Color Space Conversion Matrix ............................................... 57
SD Luma and Color Scale Control........................................... 59
SD Hue Adjust Control.............................................................. 59
SD Brightness Detect ................................................................. 59
SD Brightness Control ............................................................... 59
SD Input Standard Autodetection............................................ 60
Double Buffering ........................................................................ 61
Programmable DAC Gain Control .......................................... 61
Gamma Correction .................................................................... 61
ED/HD Sharpness Filter and Adaptive Filter Controls......... 63
ED/HD Sharpness Filter and Adaptive Filter Application
Examples...................................................................................... 64
SD Digital Noise Reduction...................................................... 65
SD Active Video Edge Control ................................................. 66
External Horizontal and Vertical Synchronization Control ... 68
Low Power Mode........................................................................ 69
Cable Detection .......................................................................... 69
DAC Autopower-Down............................................................. 69
Sleep Mode .................................................................................. 70
Pixel and Control Port Readback............................................. 70
Reset Mechanism........................................................................ 70
SD Teletext Insertion ................................................................. 70
Printed Circuit Board Layout and Design .................................. 72
Unused Pins ................................................................................ 72
DAC Configurations .................................................................. 72
Voltage Reference ....................................................................... 72
Video Output Buffer and Optional Output Filter.................. 72
Printed Circuit Board (PCB) Layout ....................................... 73
Typical Application Circuit....................................................... 75
Copy Generation Management System....................................... 76
SD CGMS .................................................................................... 76
ED CGMS.................................................................................... 76
Rev. E | Page 2 of 106




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