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ADF4108 반도체 회로 부품 판매점

PLL Frequency Synthesizer



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ADF4108 데이터시트, 핀배열, 회로
Data Sheet
PLL Frequency Synthesizer
ADF4108
FEATURES
GENERAL DESCRIPTION
8.0 GHz bandwidth
3.2 V to 3.6 V power supply
Separate charge pump supply (VP) allows extended tuning
voltage in 3.3 V systems
Programmable, dual-modulus prescaler
8/9, 16/17, 32/33, or 64/65
Programmable charge pump currents
Programmable antibacklash pulse width
3-wire serial interface
Analog and digital lock detect
Hardware and software power-down mode
Loop filter design possible with ADIsimPLL
4 mm × 4 mm, 20-lead chip scale package
APPLICATIONS
Broadband wireless access
Satellite systems
Instrumentation
Wireless LANs
Base stations for wireless radio
The ADF4108 frequency synthesizer can be used to implement
local oscillators in the upconversion and downconversion sections
of wireless receivers and transmitters. It consists of a low noise
digital PFD (phase frequency detector), a precision charge pump, a
programmable reference divider, programmable A and B counters,
and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B
(13-bit) counters, in conjunction with the dual-modulus prescaler
(P/P + 1), implement an N divider (N = BP + A). In addition,
the 14-bit reference counter (R counter), allows selectable REFIN
frequencies at the PFD input. A complete phase-locked loop (PLL)
can be implemented if the synthesizer is used with an external
loop filter and voltage controlled oscillator (VCO). Its very high
bandwidth means that frequency doublers can be eliminated in
many high frequency systems, simplifying system architecture
and reducing cost.
FUNCTIONAL BLOCK DIAGRAM
AVDD DVDD
VP CPGND
RSET
REFERENCE
REFIN
CLK
DATA
LE
RFINA
RFINB
14-BIT
R COUNTER
14
R COUNTER
LATCH
24-BIT INPUT
REGISTER
22
FUNCTION
LATCH
SDOUT
FROM
FUNCTION
LATCH
A, B COUNTER
LATCH
13
N = BP + A
13-BIT
B COUNTER
PRESCALER
P/P + 1
LOAD
LOAD
6-BIT
A COUNTER
CE AGND DGND
6
PHASE
FREQUENCY
DETECTOR
CHARGE
PUMP
CP
LOCK
DETECT
CURRENT
SETTING 1
CURRENT
SETTING 2
CPI3 CPI2 CPI1 CPI6 CPI5 CPI4
HIGH-Z
19 AVDD
MUX
MUXOUT
SDOUT
M3 M2 M1
ADF4108
Figure 1.
Rev. E
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Tel: 781.329.4700 ©2006–2013 Analog Devices, Inc. All rights reserved.
Technical Support
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ADF4108 데이터시트, 핀배열, 회로
ADF4108* Product Page Quick Links
Last Content Update: 11/01/2016
Comparable Parts
View a parametric search of comparable parts
Evaluation Kits
• ADF4108 Evaluation Board
Documentation
Application Notes
• AN-30: Ask the Applications Engineer - PLL Synthesizers
• AN-349: Keys to Longer Life for CMOS
• AN-873: Lock Detect on the ADF4xxx Family of PLL
Synthesizers
Data Sheet
• ADF4108: PLL Frequency Synthesizer Data Sheet
User Guides
• UG-160: Evaluation Board for Integer-N PLL Frequency
Synthesizer
• UG-476: PLL Software Installation Guide
Tools and Simulations
• ADIsimPLL™
• ADIsimRF
Reference Materials
Product Selection Guide
• RF Source Booklet
Design Resources
• ADF4108 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
Discussions
View all ADF4108 EngineerZone Discussions
Sample and Buy
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Technical Support
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