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DUAL KEY DIMM



White Electronic 로고
White Electronic
WED2DG472512V-D2 데이터시트, 핀배열, 회로
www.DataSheet4U.com
White Electronic Designs
WED2DG472512V-D2
ADVANCED*
16MB (4x512Kx72) SYNC BURST-PIPELINE,
DUAL KEY DIMM
FEATURES
4x512Kx72 Synchronous, Synchronous Burst
Pipeline Architecture; Single Cycle Deselect
Linear and Sequential Burst Support via MODE pin
Clock Controlled Registered Module Enable (EM#)
Clock Controlled Registered Bank Enables (E1#, E2#,
E3#, E4#)
Clock Controlled Byte Write Mode Enable (BWE#)
Clock Controlled Byte Write Enables (BW1# - BW8#)
Clock Controlled Registered Address
Clock Controlled Registered Global Write (GW#)
Asynchronous Output Enable (G#)
Internally Self-Timed Write
Individual Bank Sleep Mode Enables (ZZ1, ZZ2, ZZ3, ZZ4)
Gold Lead Finish
3.3V ± 10% Operation
Frequency(s): 200, 166, 150, and 133MHz
Access Speed(s): tKHQV = 3.0, 3.5, 3.7, and 4.0ns
Common Data I/O
High Capacitance (30pF) Drive, at Rated Access Speed
Single Total Array Clock
Multiple Vcc and Gnd for Improved Noise Immunity
DESCRIPTION
The WED2DG472512V is a Synchronous/Synchronous
Burst SRAM, 84 position Dual Key; Double High DIMM
(168 contacts) Module, organized as 4x512Kx72. The
Module contains sixteeen (16) Synchronous Burst
RAM devices, packaged in the industry standard
JEDEC 14mmx20mm TQFP placed on a Multilayer
FR4 Substrate. The Module Architecture is defined as a
Sync/SyncBurst, Pipeline, with support for either linear or
sequential burst. This Module provides high performance,
3-1-1-1 accesses when used in Burst Mode, and when
used in Synchronous Only Mode, provides a high
performance, data access every second cycle.
Synchronous Only operations are performed via strapping
ADSC# Low, and ADSP#/ADV# High, which provides for
Ultra Fast Accesses in Read Mode while providing for
internally self-timed Early Writes.
Synchronous/Synchronous Burst operations are in
relation to an externally supplied clock, Registered
Address, Registered Global Write, Registered Enables as
well as an Asynchronous Output Enable. This Module has
been defined with full flexibility, which allows individual
control of each of the eight bytes, as well as Quad Words
in both Read and Write Operations.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January 2000
Rev. 0
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com


WED2DG472512V-D2 데이터시트, 핀배열, 회로
White Electronic Designs
WED2DG472512V-D2
ADVANCED
FIG. 1 PIN CONFIGURATION
PIN IDENTIFIER
VSS
A0
A16
A2
A14
VCC
A4
A12
A6
A10
VSS
A8
RFU
E4#
E2#
VSS
MODE
EM#
GW#
RFU
VCC
BW4#
BW3#
BW8#
BW7#
ADSC#
ADSP#
VSS
NC
VCC
DQ0
DQ1
DQ2
DQ3
VSS
ZZ1
VCC
DQ8
DQ9
DQ10
DQ11
VSS
1 85
2 86
3 87
4 88
5 89
6 90
7 91
8 92
9 93
10 94
11 95
12 96
13 97
14 98
15 99
16 100
17 101
18 102
19 103
20 104
21 105
22 106
23 107
24 108
25 109
26 110
27 111
28 112
29 113
30 114
31 115
32 116
33 117
34 118
35 119
36 120
37 121
38 122
39 123
40 124
41 125
42 126
VSS
A17
A1
A15
A3
VCC
A13
A5
A11
A7
VSS
A9
A18
E1#
E3#
VSS
CK
VSS
G#
BWE#
VCC
BW2#
BW1#
BW6#
BW5#
VSS
ADV#
VSS
DQP0
VCC
DQ7
DQ6
DQ5
DQ4
VSS
DQP1
VCC
DQ15
DQ14
DQ13
DQ12
VSS
NC
VCC
DQ16
DQ17
DQ18
DQ19
VSS
ZZ2
VCC
DQ24
DQ25
DQ26
DQ27
VSS
NC
VCC
DQ32
DQ33
DQ34
DQ35
VSS
ZZ3
VCC
DQ40
DQ41
DQ42
DQ43
VSS
NC
VCC
DQ48
DQ49
DQ50
DQ51
VSS
ZZ4
VCC
DQ56
DQ57
DQ58
DQ59
VSS
43 127
44 128
45 129
46 130
47 131
48 132
49 133
50 134
51 135
52 136
53 137
54 138
55 139
56 140
57 141
58 142
59 143
60 144
61 145
62 146
63 147
64 148
65 149
66 150
67 151
68 152
69 153
70 154
71 155
72 156
73 157
74 158
75 159
76 160
77 161
78 162
79 163
80 164
81 165
82 166
83 167
84 168
DQP2
VCC
DQ23
DQ22
DQ21
DQ20
VSS
DQP3
VCC
DQ31
DQ30
DQ29
DQ28
VSS
DQP4
VCC
DQ39
DQ38
DQ37
DQ36
VSS
DQP5
VCC
DQ47
DQ46
DQ45
DQ44
VSS
DQP6
VCC
DQ55
DQ54
DQ53
DQ52
VSS
DQP7
VCC
DQ63
DQ62
DQ61
DQ60
VSS
PIN DESCRIPTION
DQ0 - DQ63
DQP0 - DQP7
A0 - A18
EM#
E1#, E2#, E3#, E4#
BWE#
BW1# - BW8#
CK
GW#
G#
ZZ1, ZZ2, ZZ3, ZZ4
Vcc
Vss
Input/Output Bus
Parity Bits
Address Bus
Module Enable
Synchronous Bank Enables
Byte Write Mode Enable
Byte Write Enables
Array Clock
Synchronous Global Write Enable
Asynchronous Output Enable
Bank Sleep Mode Enables
3.3V Power Supply
Gnd
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January 2000
Rev. 0
2 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com




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