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PDF MTV121 Data sheet ( Hoja de datos )

Número de pieza MTV121
Descripción Super On-Screen-Display
Fabricantes Myson 
Logotipo Myson Logotipo



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No Preview Available ! MTV121 Hoja de datos, Descripción, Manual

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MYSON
TECHNOLOGY
MTV121
Super On-Screen-Display for LCD Monitor
FEATURES
GENERAL DESCRIPTION
• Horizontal sync input may be up to 130 KHz.
• Acceptable wide-range pixel clock up to 96MHz.
• Full screen display consists of 15 (rows) by 30 (columns)
characters.
• 12 x 18 dot matrix per character.
• Total 272 characters and graphic fonts including 256
standard and 16 multi-color mask ROM fonts.
• 8 color selectable maximum per display character.
• 7 color selectable maximum for character background.
• Double character height and/or width control.
• Programmable positioning for display screen center.
• Bordering, shadowing and blinking effect.
• Programmable character height (18 to 71 lines) control.
• Row to row spacing register to manipulate the constant
display height.
• 4 programmable background windows with multi-level
operation and shadowing on window effect.
• Software clears bit for full-screen erasing.
• Half tone and fast blanking output.
• Fade-in/fade-out effect.
• 8 channels 8 bits PWM D/A converters output.
• Compatible to SPI bus or I2C interface with slave
address 7AH (Slave address is mask option).
• 16 / 20 / 24 pins PDIP / SOP package.
MTV121 is designed for LCD monitor applications
to display the built-in characters or fonts onto an LCD
monitor screen. The display operation is by transfer-
ring data and control information from micro control-
ler to RAM through a serial data interface. It can
execute full screen display automatically and spe-
cific functions such as character background color,
bordering, shadowing, blinking, double height and
width, font by font color control, frame positioning,
frame size control by character height and row-to-
row spacing, horizontal display resolution, full-screen
erasing, fade-in/fade-out effect, windowing effect and
shadowing on window.
MTV121 provide 256 standard and 16 multi-color
fonts for more efficacious applications. The full OSD
menu is formed of 15 rows x 30 columns which can
be positioned on anywhere of the monitor screen by
changing vertical delay or horizontal delay.
Moreover, MTV121 also provide 8 PWM DAC
channels with 8 bits resolution and a PWM clock out-
put for external digital to analog control.
BLOCK DIAGRAM
SSB
SCK
SDA
VFLB
HFLB
NC
XIN
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
SERIAL DATA
INTERFACE
8DATA
9ROW, COL
ACK
ARWDB
HDREN
VDREN
NROW
ADDRESS BUS
ADMINISTRATOR
5 RCADDR
9 DADDR
9 FONTADDR
5 WINADDR
5 PWMADDR
VSP CH 7
CHS
VERTD 8
VERTICAL
DISPLAY
CONTROL
5 LPN
NROW
VDREN
HORIZONTAL
ARWDB
HSP HORD 8 DISPLAY CONTROL HDREN
CLOCK
GENERATOR
VCLKX
PWM D/A
CONVERTER
8 DATA
DATA 8
CWS
CHS
DISPLAY & ROW
CONTROL
REGISTERS
LUMAR
LUMAG
LUMAB
BLINK
8 CRADDR
DATA 8
LPN 5
CWS
VCLKS
CHARACTER ROM LUMA
USER FONT RAM
BORDER
LUMINANCE &
BORDGER
GENERATOR
DATA 8
8 VERTD
8 HORD
7 CH
WINDOWS &
FRAME
CONTROL
BSEN
SHADOW
OSDENB
HSP
VSP
LUMAR
LUMAG
LUMAB
BLINK
VCLKX
COLOR
ENCODER
POWER ON
PRB
RESET
VDD
VSS
VDDA
VSSA
ROUT
GOUT
BOUT
FBKG
HTONE
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice.
No liability is assumed as a result of the use of this procuts. No rights under any patent accompany the sales of the product.
1/18
MTV121 Revision 5.0 06/29/1999
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MTV121 pdf
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MYSON
TECHNOLOGY
MTV121
TABLE 1. The configuration of transmission formats.
Address b7 b6 b5 b4 b3 b2 b1 b0 Format
Row
1 0 0 x R3 R2 R1 R0 a,b,c
Address Bytes
of Display Reg.
Columnab
0
0
x C4 C3 C2 C1 C0
a,b
Columnc 0 1 x C4 C3 C2 C1 C0
c
Row
1 0 1 x R3 R2 R1 R0 a,b,c
Attribute Bytes
of Display Reg.
Columnab
0
0
x C4 C3 C2 C1 C0
a,b
Columnc 0 1 x C4 C3 C2 C1 C0
c
The data transmission is permitted to change from format (a) to format (b) and (c), or from format (b) to format
(a), but not from format (c) back to format (a) and (b). The alternation between transmission formats is config-
ured as the state diagram shown in Figure 3.
0, X
Initiate
Input = b7, b6
1, X
format (a)
1, X ROW
format (c) 0, 1
COL
c
0, 1
format (b)
0, 0
COL
ab
1, X
X, X DA
c
DA
ab
FIGURE 3. Transmission State Diagram
3.2 Address bus administrator
The administrator manages bus address arbitration of internal registers or user fonts RAM during external
data write in. The external data write through serial data interface to registers must be synchronized by inter-
nal display timing. In addition, the administrator also provides automatic increment to address bus when exter-
nal write using format (c).
3.3 Vertical display control
The vertical display control can generates different vertical display sizes for most display standards in current
monitors. The vertical display size is calculated with the information of double character height bit(CHS), verti-
cal display height control register(CH6-CH0).The algorithm of repeating character line display are shown as
Table 2 and Table 3. The programmable vertical size range is 270 lines to maximum 2130 lines.
5/18
MTV121 Revision 5.0 06/29/1999
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MTV121 arduino
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MYSON
TECHNOLOGY
MTV121
The initial value is 0 after power up.
DWE - Enable double width. When the bit is set to “1”, the display of OSD menu can change to half resolution
for double character width, and then the number of pixels of each line should be even. The initial value
is 0 after power up.
HSP -
VSP -
= 1 Accept positive polarity Hsync input.
= 0 Accept negative polarity Hsync input.
= 1 Accept positive polarity Vsync input.
= 0 Accept negative polarity Vsync input.
PWM1, PWM0 - Select the PWMCK output frequency.
= (0, 0) XIN frequency /8
= (0, 1) XIN frequency /4
= (1, 0) XIN frequency /2
= (1, 1) XIN frequency /1
The initial value is (0, 0) after power up.
Notes : When XIN is not present, dont’ write data in any address. If data is written in any other address, a
malfunction may occur.
TABLE 5. PWMCK Frequency and PWMDA sampling rate
(PWM1, PWM0)
( 0, 0 )
( 0, 1 )
( 1, 0 )
( 1 ,1 )
PWMCK Freq
XIN frequency /8
XIN frequency /4
XIN frequency /2
XIN frequency /1
PWMDA sampling rate
XIN frequency /(8 * 256)
XIN frequency /(4 * 256)
XIN frequency /(2 * 256)
XIN frequency /(1 * 256)
B7 b6 b5 b4 b3 b2 b1 b0
Column 19
-
WSR WSG WSB
-
CSR CSG CSB
WSR, WSG, WSB - Define the color of shadowing on windows. The initial value is (0, 0, 0) after power up.
CSR, CSG, CSB - Define the color of bordering or shadowing on characters. The initial value is (0, 0, 0) after
power up.
B7 b6 b5 b4 b3 b2 b1 b0
Column 20
-
-
-
-
-
-
- CFONT
CFONT - Enable 16 multi-color fonts.
= 0 Character address 240 to 255 are connected to standard ROM fonts.
= 1 Character address 240 to 255 are connected to 16 multi-color ROM fonts.
The initial value is 0 after power up.
B7 b6 b5 b4 b3 b2 b1 b0
Column 21 WW41 WW40 WW31 WW30 WW21 WW20 WW11 WW10
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MTV121 Revision 5.0 06/29/1999

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