파트넘버.co.kr T8208 데이터시트 PDF


T8208 반도체 회로 부품 판매점

ATM Interconnect



Agere Systems 로고
Agere Systems
T8208 데이터시트, 핀배열, 회로
www.DataSheet4U.com
Advance Data Sheet
September 2001
CelXpresTM T8208
ATM Interconnect
1 Product Overview
s Programmable priority for control/data cells trans-
mission onto cell bus
1.1 Features
s Microprocessor access to all headers of control
cell
s OC-12 data throughput on UTOPIA (16-bit)
(independently on RX and TX UTOPIA)
s Shared UTOPIA mode
s Ability to clear counters on read
s Simplified looping to any system device with a sin-
gle register programming
s UTOPIA Level 1 and 2 (8-bit/16-bit) cell-level
handshake interface (ATM or PHY layers)
s Multi-PHY (MPHY) operation
s UTOPIA clock sourcing with additional settings
s Programmable operations and maintenance and
resource management (OAM/RM) cell routing
s Programmable ATM layer supports up to 64 PHY
ports
s Support of multicast and broadcast cells per PHY
s Egress SDRAM buffer support to extend UTOPIA
s Optional monitoring of misrouted cells
output priority queues for 32K to 512K cells:
s Counters for dropped cells per queue
— 128 queues configurable up to four queues per
PHY with programmable sizes
s Digital loopback before cell bus
DataShee
— Programmable number of UTOPIA output
s Microprocessor interface, supporting both Motor-
queues with four levels of priority DataSheet4U.com ola® and Intel® modes (multiplexed and nonmulti-
s Support of ATM traffic management via partial
plexed)
packet discard (PPD), forward explicit congestion s Control cell transmission and reception through
notification (FECN), and the cell loss priority (CLP)
microprocessor port
bit s Single 3.3 V power supply
s Programmable slew rate GTL+ I/O:
— Programmable as bus arbiter
— 1.7 Gbits/s cell bus operation
s 3.3 V TTL I/O (5 V tolerant)
s 272-pin plastic ball grid array (PBGA) package
s Flexible per port cell counters
s Cell header insertion with virtual path identifier
(VPI) and virtual channel identifier (VCI) translation
via external SRAM (up to 64K entries)
s Support of network node interface (NNI) and user
network interface (UNI) header types with optional
generic flow-control (GFC) insertion
s Industrial temperature range (–40 °C to +85 °C)
s Hot insertion capability
s Eight GPIO pins
s JTAG support
s Compatible with Transwitch CellBus®
s Optional sourcing of cell bus clocks from device
s LUT bypass option
1.2 Applications
s TX UTOPIA cell buffer increased to 256 cells for
better queue management with SDRAM queue
bypass option
s Ability for cell bus arbiter to mask devices on the
cell bus
s Ability to modify cell bus priority based on RX PHY
FIFO thresholds
s Asymmetric digital subscriber line (ADSL) digital
subscriber line access multiplexers (DSLAMs)
s Access gateways
s Access multiplexers/concentrators
s Multiservice platforms
DataSheet4U.com
DataSheet4 U .com
DataSheet4U.com


T8208 데이터시트, 핀배열, 회로
www.DataSheet4U.com
CelXpres T8208
ATM Interconnect
Advance Data Sheet
September 2001
Table of Contents
Contents
Page
1 Product Overview................................................................................................................................................1
1.1 Features ....................................................................................................................................................1
1.2 Applications ...............................................................................................................................................1
1.3 Description ................................................................................................................................................9
1.4 Conventions ............................................................................................................................................12
1.5 Glossary ..................................................................................................................................................13
2 Pinout ................................................................................................................................................................14
3 Powerup/Reset Sequence ................................................................................................................................22
4 Hot Insertion......................................................................................................................................................23
5 PLL Configuration .............................................................................................................................................24
6 Microprocessor Interface ..................................................................................................................................25
6.1 Microprocessor Interface Configuration ..................................................................................................25
6.2 Microprocessor Interrupts........................................................................................................................25
6.3 Accessing the CelXpres T8208 via Microprocessor Interface.................................................................25
6.3.1 Accessing the Extended Memory Registers...............................................................................26
6.3.1.1 Extended Memory Writes.............................................................................................26
6.3.1.2 Extended Memory Reads.............................................................................................26
6.3.2 CelXpres T8208 Access Performance .......................................................................................27
7 General-Purpose I/O (GPIO) ............................................................................................................................28
8 Look-Up Table ..................................................................................................................................................29
8.1 Look-Up Table RAM................................................................................................................................29
et4U.com 8.2 Organization ............................................................................................................................................30
8.3 Look-Up Procedure .................................................................................................................................35
8.4 Extended Records.....................................D...a..t.a..S..h..e..e..t.4..U.....c..o..m...................................................................38
8.5 Diagnostics..............................................................................................................................................42
8.6 Setup .......................................................................................................................................................42
8.7 LUT Bypass.............................................................................................................................................42
9 UTOPIA Interface..............................................................................................................................................43
9.1 Incoming UTOPIA Cell Interface .............................................................................................................44
9.1.1 Incoming PHY Mode (Cells Received by T8208) .......................................................................44
9.1.2 Incoming ATM Mode (Cells Received by T8208).......................................................................44
9.2 Outgoing UTOPIA Cell Interface .............................................................................................................45
9.2.1 Outgoing PHY Mode (Cells Sent by T8208)...............................................................................45
9.2.2 Outgoing ATM Mode (Cells Sent by T8208) ..............................................................................46
9.3 Counters..................................................................................................................................................48
9.3.1 Dropped Cell Counters...............................................................................................................49
9.4 55-Byte UTOPIA Mode............................................................................................................................49
9.5 Shared UTOPIA Mode ............................................................................................................................50
9.6 UTOPIA Pin Modes .................................................................................................................................52
9.6.1 UTOPIA Pin Modes for 8-Bit UTOPIA Operation .......................................................................52
9.6.2 UTOPIA Pin Modes for 16-Bit UTOPIA Operation .....................................................................56
9.7 UTOPIA Clocking ....................................................................................................................................58
9.8 Option for Counters to Clear on Read.....................................................................................................58
10 Cell Bus Interface..............................................................................................................................................59
10.1 General Architecture ...............................................................................................................................59
10.2 Cell Bus Frames......................................................................................................................................61
10.3 Cell Bus Routing Headers .......................................................................................................................64
10.3.1 Control Cells...............................................................................................................................65
10.3.2 Data Cells...................................................................................................................................65
10.3.3 Loopback Cells...........................................................................................................................66
10.3.4 Multicast Routing........................................................................................................................66
DataSheet4U.com10.3.5 Broadcast Routing......................................................................................................................67
2 Agere Systems Inc.
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