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ST Microelectronics |
STA015
STA015B STA015T
MPEG 2.5 LAYER III AUDIO DECODER
WITH ADPCM CAPABILITY
■ SINGLE CHIP MPEG2 LAYER 3 DECODER
SUPPORTING:
– All features specified for Layer III in ISO/IEC
11172-3 (MPEG 1 Audio)
– All features specified for Layer III in ISO/IEC
13818-3.2 (MPEG 2 Audio)
m– Lower sampling frequencies syntax exten-
osion, (not specified by ISO) called MPEG 2.5
.c■ DECODES LAYER III STEREO CHANNELS,
DUAL CHANNEL, SINGLE CHANNEL (MONO)
■ SUPPORTING ALL THE MPEG 1 & 2
USAMPLING FREQUENCIES AND THE
EXTENSION TO MPEG 2.5:
t448, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
■ ACCEPTS MPEG 2.5 LAYER III
eELEMENTARY COMPRESSED BITSTREAM
WITH DATA RATE FROM 8 Kbit/s UP TO 320
eKbit/s
h■ ADPCM CODEC CAPABILITIES:
– sample frequency from 8 kHz to 32 kHz
S– sample size from 8 bits to 32 bits
– encoding algorithm: DVI,
taITU-G726 pack (G723-24, G721,G723-40)
– Tone control and fast-forward capability
a■ EASY PROGRAMMABLE GPSO INTERFACE
FOR ENCODED DATA UP TO 5Mbit/s
.D(TQFP44 & LFBGA 64)
■ DIGITAL VOLUME CONTROL
■ DIGITAL BASS & TREBLE CONTROL
w■ BYPASS MODE FOR EXTERNAL AUDIO
SOURCE
w■ SERIAL BITSTREAM INPUT INTERFACE
w■ EASY PROGRAMMABLE ADC INPUT
SO28
TQFP44
LFBGA64
ORDERING NUMBER: STA015$ (SO28)
STA015T$ (TQFP44)
STA015B$ (LFBGA 8x8)
INDICATORS
■ I2C CONTROL BUS
■ LOW POWER 2.4V CMOS TECHNOLOGY
■ WIDE RANGE OF EXTERNAL CRYSTALS
FREQUENCIES SUPPORTED
APPLICATIONS
■ PC SOUND CARDS
■ MULTIMEDIA PLAYERS
■ VOICE RECORDERS
DESCRIPTION
The STA015 is a fully integrated high flexibility
MPEG Layer III Audio Decoder, capable of decod-
ing Layer III compressed elementary streams, as
specified in MPEG 1 and MPEG 2 ISO standards.
The device decodes also elementary streams
compressed by using low sampling rates, as spec-
INTERFACE
■ ANCILLARY DATA EXTRACTION VIA I2C
INTERFACE.
■ SERIAL PCM OUTPUT INTERFACE (I2S AND
OTHER FORMATS)
■ PLL FOR INTERNAL CLOCK AND FOR
OUTPUT PCM CLOCK GENERATION
■ CRC CHECK AND SYNCHRONISATION
ERROR DETECTION WITH SOFTWARE
March 2004
ified by MPEG 2.5. STA015 receives the input
mdata through a Serial input Interface. The decoded
osignal is a stereo, mono, or dual channel digital
.coutput that can be sent directly to a D/A converter,
Uby the PCM Output Interface.
t4This interface is software programmable to adapt
ethe STA015 digital output to the most common
eDACs architectures used on the market. The func-
htional STA015 chip partitioning is described in
SFig.1a and Fig.1b.
www.Data 1/55
STA015 STA015B STA015T
Figure 1.
1a. Block Diagram for TQFP44 and LFBGA64 package.
TQFP44
SDI
SCKR
BIT_EN
34
36 SERIAL
INPUT
38 INTERFACE
27
DATA-REQ
SCK_ADC
LRCK_ADC
SDI_ADC
40
26 ADC
INPUT
24 INTERFACE
BUFFER
256 x 8
SDA
31
SCL
32
I2C CONTROL
PARSER
DSP BASED
MPEG L III
ADPCM
CORE
VOLUME
& TONE
CONTROL
SYSTEM & AUDIO CLOCKS
25
RESET
15
XTI
13
XTO
22
TESTEN
12
FILT
OUTPUT
BUFFER
GPIO
INTERFACE
PCM
OUTPUT
INTERFACE
GPSO
INTERFACE
35
STROBE
20
18
16
14
37 IODATA
[7:0]
39
41
43
42
SDO
44
SCKT
2
LRCKT
3
OCLK
4
GPSO_REQ
28
GPSO_SCKR
33
GPSO_DATA
D99AU1116B
1b. BLOCK DIAGRAM for SO28 package
SO28
SDI
SCKR
BIT_EN
5
6
7
SERIAL
INPUT
INTERFACE
28
GPSO_SCKR
SCK_ADC
LRCK_ADC
SDI_ADC
8
27 ADC
INPUT
25 INTERFACE
BUFFER
256 x 8
SDA
3
SCL
4
I2C CONTROL
PARSER
DSP BASED
MPEG L III
ADPCM
CORE
VOLUME
& TONE
CONTROL
SYSTEM & AUDIO CLOCKS
26
RESET
21
XTI
20
XTO
24
TESTEN
19
FILT
OUTPUT
BUFFER
9
PCM
OUTPUT
INTERFACE
10
11
12
SDO
SCKT
LRCKT
OCLK
D99AU1117B
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