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ww.DataSh83Ee20me-9tB4b6Uei0t.dCcHodFmieg-4dh0-M,P-ie3cr3rfoo, p-r2mr5oacnecsesoSruperscalarProduct Features
w s Socket and Object Code Compatible with 80960CA
ms Two Instructions/Clock Sustained Execution
s Four 71 Mbytes/s DMA Channels with Data Chaining
os Demultiplexed 32-Bit Burst Bus with Pipelining
Datasheet
.cs 32-Bit Parallel Architecture
— Two Instructions/clock Execution
U—Load/Store Architecture
t4—Sixteen 32-Bit Global Registers
— Sixteen 32-Bit Local Registers
e—Manipulates 64-Bit Bit Fields
— 11 Addressing Modes
e—Full Parallel Fault Model
h—Supervisor Protection Model
s Fast Procedure Call/Return Model
S—Full Procedure Call in 4 Clocks
tas On-Chip Register Cache
— Caches Registers on Call/Ret
— Minimum of 6 Frames Provided
a—Up to 15 Programmable Frames
.Ds On-Chip Instruction Cache
— 4 Kbyte Two-Way Set Associative
— 128-Bit Path to Instruction Sequencer
w—Cache-Lock Modes
— Cache-Off Mode
ws High Bandwidth On-Chip Data RAM
m— 1 Kbyte On-Chip Data RAM
w o—Sustains 128 bits per Clock Access
.cs Selectable Big or Little Endian Byte
UOrdering
s Four On-Chip DMA Channels
— 71 Mbytes/s Fly-by Transfers
— 40 Mbytes/s Two-Cycle Transfers
— Data Chaining
— Data Packing/Unpacking
— Programmable Priority Method
s 32-Bit Demultiplexed Burst Bus
— 128-Bit Internal Data Paths to and from
Registers
— Burst Bus for DRAM Interfacing
— Address Pipelining Option
— Fully Programmable Wait States
— Supports 8-, 16- or 32-Bit Bus Widths
— Supports Unaligned Accesses
— Supervisor Protection Pin
s High-Speed Interrupt Controller
— Up to 248 External Interrupts
— 32 Fully Programmable Priorities
— Multi-mode 8-Bit Interrupt Port
— Four Internal DMA Interrupts
— Separate, Non-maskable Interrupt Pin
— Context Switch in 625 ns Typical
s On-Chip Data Cache
— 1 Kbyte Direct-Mapped, Write Through
— 128 bits per Clock Access on Cache Hit
.DataSheet4Order Number: 272886-002
www September 2002
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future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 80960CF-40, -33, -25 32-Bit High-Performance Superscalar Embedded Microprocessor may contain design defects or errors known as errata
which may cause the product to deviate from published specifications. Current characterized errata are available on request.
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2 Datasheet
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