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Supertex |
Ordewri.nDgatInafSohrmeeatt4ioUn.comPVe-Crth–icaanlOnDeMl BEOnShSFanEOcTesmLenEt-MTodEe –VVPP00664550BVDSS /
wBVDGS
w -450V
m-500V
RDS(ON)
(max)
30Ω
30Ω
o† MIL visual screening available
ID(ON)
(min)
-0.2A
-0.2A
TO-39
VP0645N2
—
Order Number / Package
TO-92
—
VP0650N3
TO-220
—
VP0650N5
Die†
VP0645ND
VP0650ND
Advanced DM.OcS TechnologyHigh Reliability Devices
See pages 5-4 and 5-5 for MILITARY STANDARD Process
UFlows and Ordering Information.
Features et4■ Free from secondary breakdown
e■ Low power drive requirement
h■ Ease of paralleling
■
Low C and fast switching speeds
ISS
S■ Excellent thermal stability
ta■ Integral Source-Drain diode
■ High input impedance and high gain
a■ Complementary N- and P-channel devices
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Applications .D Package Options■ Motor controls
w■ Converters
w■ Amplifiers
■ Switches
w om■ Power supply circuits
.c■ Drivers (relays, hammers, solenoids, lamps, memories,
Udisplays, bipolar transistors, etc.)
Absolute Maximum Ratings Sheet4Drain-to-Source Voltage
taDrain-to-Gate Voltage
aGate-to-Source Voltage
.DOperating and Storage Temperature
wSoldering Temperature*
ww* Distance of 1.6 mm from case for 10 seconds.
BVDSS
BVDGS
± 20V
-55°C to +150°C
300°C
G DS
TO-220
TAB: DRAIN
DGS
TO-39
Case: DRAIN
SGD
TO-92
Note: See Package Outline section for dimensions.
7-245
7
9
Thermal Characteristics
Package
ID (continuous)*
ID (pulsed)
TO-92
TO-39
TO-220
-0.1A
-0.25A
-0.25A
* ID (continuous) is limited by max rated Tj.
-0.3A
-0.5A
-0.5A
Power Dissipation
@ TC = 25°C
1W
6W
45W
θjc
°C/W
125
21
2.7
VP0645/VP0650
θja
°C/W
170
125
70
IDR*
-0.1A
-0.25A
-0.25A
IDRM
-0.3A
-0.5A
-0.5A
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol
Parameter
Min Typ Max Unit
Conditions
BVDSS
Drain-to-Source
Breakdown Voltage
VP0650
VP0645
-500
-450
V VGS = 0V, ID = -2mA
VGS(th)
Gate Threshold Voltage
-2
-4 V
VGS = VDS, ID = -2mA
∆VGS(th)
Change in VGS(th) with Temperature
-4.8 mV/°C
VGS = VDS, ID = -2mA
IGSS Gate Body Leakage
-100
nA
VGS = ±20V, VDS = 0V
IDSS Zero Gate Voltage Drain Current
-10 µA
VGS = 0V, VDS = Max Rating
-1 mA
VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
ID(ON)
ON-State Drain Current
-200
mA VGS = -5V, VDS = -25V
RDS(ON)
Static Drain-to-Source
ON-State Resistance
-200 -700
27 Ω
22 30
VGS = -10V, VDS = -25V
VGS = -5V, ID = -100mA
VGS = -10V, ID = -100mA
∆RDS(ON) Change in RDS(ON) with Temperature
0.75 %/°C
VGS = -10V, ID = -100mA
GFS Forward Transconductance
50 125
m VDS = -25V, ID = -100mA
CISS
COSS
CRSS
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
95 160
50 75
10 20
pF
VGS = 0V, VDS =- 25V
f = 1 MHz
td(ON)
tr
td(OFF)
tf
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
10
10
ns
20
15
VDD = -25V
ID = -200mA
RGEN = 25Ω
VSD Diode Forward Voltage Drop
-1.8 V
VGS = 0V, ISD = -50mA
trr Reverse Recovery Time
300 ns VGS = 0V, ISD = -50mA
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
– OBSOLETESwitching Waveforms and Test Circuit
0V
10%
PULSE
INPUT
GENERATOR
–
-10V
t(ON)
90%
t(OFF)
Rgen
0V
OUTPUT
VDD
td(ON)
tr
td(OFF)
tF
90%
90%
10%
10%
7-246
INPUT
D.U.T.
OUTPUT
RL
VDD
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