XL93LC56B 반도체 회로 부품 판매점
2048-Bit Serial Electrically EPROM
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 EXEL |
m XL93LC56BEXEL Microelectronics, Inc.
t4U.coPreliminary Information
2,048-Bit Serial Electrically Erasable PROM
1.8V to 5.5V Operation
heeFEATURES
S• 1.8V to 5.5V Operation
ta• Extended Temperature Range: -40°C to +85°C
a• User Selectable Word length
.D• State-of-the-Art Architecture
ww— Nonvolatile data storage
— Fully TTL compatible inputs and outputs
w — Auto increment for efficient data dump
m• Hardware and Software Write Protection
o— Defaults to write-disabled state at power up
— Software instructions for write-enable/disable
.cy— VCC lockout inadvertent write protection
(XL93LC56A)
U r• Low Power Consumption
— 1mA active
t4a— 1µA standby
• Advanced Low Voltage CMOS E2PROM
Technology
eien• Versatile, Easy-to-Use Interface
— Self-timed programming cycle
— Automatic erase-before-write
h— Programming Status Indicator
— Word and chip erasable
atlaiSm• Durable and Reliable
— 100-year data retention after 100K write
cycles
— Minimum of 100,000 erase/write cycles
— Unlimited read cycles
.rDe— ESD protection (EIAJ and JEDEC standard)
PIN CONFIGURATIONS
Plastic Dual-in-line
“P” Package
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 ORG
5 GND
JEDEC Small Outline
“RY” Package
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 ORG
5 GND
JEDEC Small Outline
“Y” Package
NC 1
VCC 2
CS 3
SK 4
8 ORG
7 GND
6 DO
5 DI
D0036 ILL A01.1
PIN NAMES
CS
SK
DI
DO
GND
VCC
NC
ORG
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Not Connected
Word Organization
wOVERVIEW
wPThe XL93LC56B is a cost effective 2,048-bit, nonvolatile,
mserial E2PROM. It is fabricated using EXEL’s advanced
w oCMOS E2PROM technology. The XL93LC56B provides
.cefficient nonvolatile read/write memory arranged as 128
Uaddresses of 16 bits each or 256 addresses of 8 bits each.
t4Seven 11-bit instructions control the operation of the
edevice, which include read, write, and mode enable
efunctions. The data output pin (DO) indicates the status
hof the device during the self-timed nonvolatile program-
Sming cycle.
The self-timed write cycle includes an automatic erase-
before-write capability. To protect against inadvertent
writes, the WRITE instruction is accepted only while the
chip is in the write enabled state. A simple byte or word is
written in per write instruction into the selected address
location. If Chip Select (CS) is brought HIGH after initia-
tion of the write cycle, the Data Output (DO) pin will
indicate the READY/BUSY status of the chip.
w.DataEXEL Microelectronics, Inc.
2150 Commerce Drive • San Jose, CA 95131
wwPHONE 408 432-0500 • FAX 408 432-8710 • Internet www.exel.com
D0036 4/96
DVPTD 6931-05
BLOCK DIAGRAM
XL93LC56B
Preliminary Information
ORG
INSTRUCTION
DI REGISTER
(11 BITS)
CS
SK
INSTRUCTION
DECODE,
CONTROL
AND
CLOCK
GENERATION
DATA
REGISTER
(16 BITS)
ADDRESS
REGISTER
DUMMY
BIT
R/W
AMPS
DECODER
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
DO
E2 PROM
ARRAY
(128x16)
or
(256x8)
D0036 ILL B01.3
APPLICATIONS
The XL93LC56B is ideal for high volume applications
requiring low power and low density storage. This device
uses a cost effective, space saving 8-pin package. Can-
didate applications include robotics, alarm devices, elec-
tronic locks, meters and instrumentation settings.
ENDURANCE AND DATA RETENTION
The XL93LC56B is designed for applications requiring up
to 100,000 erase/write cycles per bit. It provides 100 years
of secure data retention without power after the execution
of 100,000 write cycles.
DEVICE OPERATION
The XL93LC56B is controlled by seven 11-bit instruc-
tions. Instructions are clocked in (serially) on the DI pin.
Each instruction begins with a logical “1” (the start bit).
This is followed by the opcode (2 bits), the address field
(8 bits), and data, if appropriate. The clock signal (SK)
may be halted at any time and the XL93LC56B will remain
in its last state. This allows full static flexibility and
maximum power conservation.
Read (READ)
The READ instruction is the only instruction that results in
serial data on the DO pin. After the read instruction and
address have been decoded, data is transferred from the
selected memory location into a serial shift register.
(Please note that one logical “0” bit precedes the actual
output data string). The output on DO changes during the
LOW-TO-HIGH transitions of SK. (See Figure 2.)
Auto Increment Read Operations
In order to facilitate memory transfer operations, the
XL93LC56B has been designed to output a continuous
stream of memory content in response to a single read
operation instruction. To utilize this function, the system
issues a read instruction specifying a start location ad-
dress. Once the addressed byte/word has been clocked
out, the data in consecutively higher address locations is
output. The address will wrap around continuously with
CS HIGH until the Chip Select control pin is brought LOW.
This allows for single instruction data dumps to be exe-
cuted with a minimum of firmware overhead.
Write Enable (WEN)
The write enable (WEN) instruction must be executed
before any device programming can be done. When VCC
is applied, this device powers up in the write disabled
state. The device then remains in a write disabled state
until a WEN instruction is executed. Thereafter the device
remains enabled until a WDS instruction is executed or
until VCC is removed. (NOTE: Neither the WEN nor the
WDS instruction has any effect on the READ instruction.
See Figure 3.)
Write (WRITE)
The WRITE instruction is followed by the address and the
8 or 16 bits of data to be written. After the last data bit has
been clocked in, and before the next rising edge of SK, CS
must be brought LOW. The falling edge of CS initiates the
self-timed programming cycle.
D0036 4/96
DVPTD 6931-05
2
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