파트넘버.co.kr XL93LC56 데이터시트 PDF


XL93LC56 반도체 회로 부품 판매점

2048-Bit Serial Electrically EPROM



EXEL 로고
EXEL
XL93LC56 데이터시트, 핀배열, 회로
t4U.com XL93LC56/56AEXEL Microelectronics, Inc.
2,048-Bit Serial Electrically Erasable PROM
with 2V Read Capability
heeFEATURES
S• 2.7 to 5.5V Operation (XL93LC56)
ta4.5 to 5.5V Operation (XL93LC56A)
.Da• Extended Temperature Range: -40°C to +85°C
w• State-of-the-Art Architecture
w— Nonvolatile data storage
w — Fully TTL compatible inputs and outputs
m— Auto increment for efficient data dump
• Hardware and Software Write Protection
o— Defaults to write-disabled state at power up
.c— Software instructions for write-enable/disable
— VCC lockout inadvertent write protection
(XL93LC56A)
U• Low Power Consumption
t4— 1mA active
— 1µA standby
e• Low Voltage Read Operations
e— Reliable read operations down to 2.0 volts
h• Advanced Low Voltage CMOS E2PROM
Technology
S• Versatile, Easy-to-Use Interface
ta— Self-timed programming cycle
— Automatic erase-before-write
— Programming Status Indicator
a— Word and chip erasable
.D• Durable and Reliable
— 100-year data retention after 100K write
cycles
w— Minimum of 100,000 erase/write cycles
— Unlimited read cycles
— ESD protection (EIAJ and JEDEC standard)
PIN CONFIGURATIONS
Plastic Dual-in-line
“P” Package
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 NC
5 GND
JEDEC Small Outline
“RY” Package
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 NC
5 GND
JEDEC Small Outline
“Y” Package
NC 1
VCC 2
CS 3
SK 4
8 NC
7 GND
6 DO
5 DI
D0005 ILL A01.1
PIN NAMES
CS
SK
DI
DO
GND
VCC
NC
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Not Connected
w mOVERVIEW
w .coThe XL93LC56/56A is a cost effective 2,048-bit, nonvola-
Utile, serial E2PROM. It is fabricated using EXEL’s ad-
t4vanced CMOS E2PROM technology. The XL93LC56/
e56A provides efficient nonvolatile read/write memory ar-
eranged as 128 registers of 16 bits each. Seven 11-bit
hinstructions control the operation of the device, which
Sinclude read, write, and mode enable functions. The data
taoutput pin (DO) indicates the status of the device during
athe self-timed nonvolatile programming cycle.
The self-timed write cycle includes an automatic erase-
before-write capability. To protect against inadvertent
writes, the WRITE instruction is accepted only while the
chip is in the write enabled state. Data is written in 16 bits
per write instruction into the selected register. If Chip
Select (CS) is brought HIGH after initiation of the write
cycle, the Data Output (DO) pin will indicate the READY/
BUSY status of the chip.
w.DEXEL Microelectronics, Inc.
2150 Commerce Drive • San Jose, CA 95131
wwPHONE 408 432-0500 • FAX 408 432-8710 • Internet www.exel.com
D0005 3/96
DVPTD 6931-04


XL93LC56 데이터시트, 핀배열, 회로
BLOCK DIAGRAM
XL93LC56/56A
INSTRUCTION
DI REGISTER
(11 BITS)
CS
SK
INSTRUCTION
DECODE,
CONTROL
AND
CLOCK
GENERATION
DATA
REGISTER
(16 BITS)
ADDRESS
REGISTER
DUMMY
BIT
R/W
AMPS
1 OF 128
DECODER
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
DO
E2 PROM
ARRAY
(128x16)
D0005 ILL B01.2
APPLICATIONS
The XL93LC56/56A is ideal for high volume applications
requiring low power and low density storage. This device
uses a cost effective, space saving 8-pin package. Can-
didate applications include robotics, alarm devices, elec-
tronic locks, meters and instrumentation settings.
ENDURANCE AND DATA RETENTION
The XL93LC56/56A is designed for applications requiring
up to 100,000 erase/write cycles per bit. It provides 100
years of secure data retention without power after the
execution of 100,000 write cycles.
DEVICE OPERATION
The XL93LC56/56A is controlled by seven 11-bit instruc-
tions. Instructions are clocked in (serially) on the DI pin.
Each instruction begins with a logical “1” (the start bit).
This is followed by the opcode (2 bits), the address field
(8 bits), and data, if appropriate. The clock signal (SK)
may be halted at any time and the XL93LC56/56A will
remain in its last state. This allows full static flexibility and
maximum power conservation.
Read (READ)
The READ instruction is the only instruction that results in
serial data on the DO pin. After the read instruction and
address have been decoded, data is transferred from the
selected memory register into a 16-bit serial shift register.
(Please note that one logical “0” bit precedes the actual 16-
bit output data string). The output on DO changes during
the LOW-TO-HIGH transitions of SK. (See Figure 2.)
Low Voltage Read
The XL93LC56/56A has been designed to ensure that
data read operations are reliable in low voltage environ-
ments. The XL93LC56/56A is guaranteed to provide
accurate data during read operations with VCC as low as
2.0V.
Auto Increment Read Operations
In order to facilitate memory transfer operations, the
XL93LC56/56A has been designed to output a continu-
ous stream of memory content in response to a single
read operation instruction. To utilize this function, the
system asserts a read instruction specifying a start loca-
tion address. Once the 16 bits of the addressed word have
been clocked out, the data in consecutively higher ad-
dress locations is output. The address will wrap around
continuously with CS HIGH until the Chip Select control
pin is brought LOW. This allows for single instruction data
dumps to be executed with a minimum of firmware over-
head.
Write Enable (WEN)
The write enable (WEN) instruction must be executed
before any device programming can be done. When VCC
is applied, this device powers up in the write disabled
state. The device then remains in a write disabled state
until a WEN instruction is executed. Thereafter the device
remains enabled until a WDS instruction is executed or
until VCC is removed. (NOTE: Neither the WEN nor the
WDS instruction has any effect on the READ instruction.
See Figure 3.)
D0005 3/96
DVPTD 6931-04
2




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