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PDF DS1021 Data sheet ( Hoja de datos )
| Número de pieza | DS1021 | |
| Descripción | Programmable 8-Bit Silicon Delay Line | |
| Fabricantes | Dallas Semiconducotr | |
| Logotipo |  |
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www.dalsemi.com
DS1021
Programmable 8-Bit
Silicon Delay Line
FEATURES
All-silicon time delay
Models with 0.25 ns and 0.5 ns steps
Programmable using 3-wire serial port or 8-
bit parallel port
Leading and trailing edge accuracy
Economical
Auto-insertable, low profile, 16-pin SOIC
package
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
PIN ASSIGNMENT
IN 1 16 VCC
E 2 15 OUT
Q/PO 3 14 S
P1 4 13 P7
P2 5 12 P6
P3 6 11 C
P4 7 10 P5
GND 8
9D
DS1021S 16-Pin SOIC (300-mil)
See Mech. Drawings Section
PIN DESCRIPTION
IN - Delay Input
P0-P7
- Parallel Program Pins
GND
- Ground
OUT
- Delay Output
VCC - +5 Volts
S - Mode Select
E - Enable
C - Serial Port Clock
Q - Serial Data Output
D - Serial Data Input
DESCRIPTION
The DS1021 Programmable 8-Bit Silicon Delay Line consists of an 8-bit, user-programmable CMOS
silicon integrated circuit. Delay values, programmed using either the 3-wire serial port or the 8-bit
parallel port, can be varied over 256 equal steps. The faster model (-25) offers a maximum delay of 73.75
ns with an incremental delay of 0.25 ns, while the slower model (-50) has a maximum delay of 137.5 ns
with an incremental delay of 0.5 ns. Both models have an inherent (step zero) delay of 10 ns. After the
user-determined delay, the input logic state is reproduced at the output without inversion. The DS1021 is
TTL- and CMOS-compatible, capable of driving 10 74LS-type loads, and features both rising and falling
edge accuracy.
The all-CMOS DS1021 integrated circuit has been designed as a reliable, economic alternative to hybrid
programmable delay lines. It is offered in a space-saving surface mount 16-pin SOIC.
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DALLAS SEMICONDUCTOR TEST CIRCUIT Figure 4
DS1021
DS1021
TEST SETUP DESCRIPTION
Figure 4 illustrates the hardware configuration used for measuring the timing parameters of the DS1021.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected to the output. The DS1021 serial and
parallel ports are controlled by interfaces to a central computer. All measurements are fully automated
with each instrument controlled by the computer over an IEEE 488 bus.
TEST CONDITIONS
INPUT:
Ambient Temperature:
Supply Voltage (VCC):
Input Pulse:
Source Impedance:
Rise and Fall Time:
Pulse Width:
Period:
25°C ± 3°C
5.0V ± 0.1V
High = 3.0V ± 0.1V
Low = 0.0V ± 0.1V
50 ohms max.
3.0 ns max.
(measured between 0.6V and 2.4V)
500 ns (DS1021–25)
2 µs (DS1021–50)
1 µs (DS1021–25)
4 µs (DS1021–50)
NOTE: Above conditions are for test only and do not restrict the operation of the device under other data
sheet conditions.
OUTPUT:
Output is loaded with a 74F04. Delay is measured between the 1.5V level of the rising edge of the input
signal and the 1.5V level of the corresponding edge of the output.
5 of 9
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet DS1021.PDF ] | |
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