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K3296 반도체 회로 부품 판매점

MOSFET ( Transistor ) - 2SK3296



NEC 로고
NEC
K3296 데이터시트, 핀배열, 회로
www.DataSheet4U.com
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3296
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The 2SK3296 is N-Channel MOS FET device that features a
low on-state resistance and excellent switching characteristics,
designed for low voltage high current applications such as
DC/DC converter with synchronous rectifier.
FEATURES
4.5 V drive available
Low on-state resistance
RDS(on)1 = 12 mMAX. (VGS = 10 V, ID = 18 A)
Low gate charge
QG = 30 nC TYP. (ID = 35 A, VDD = 16 V, VGS = 10 V)
Built-in gate protection diode
Surface mount device available
ORDERING INFORMATION
PART NUMBER
PACKAGE
2SK3296
TO-220AB
2SK3296-S
2SK3296-ZK
2SK3296-ZJ
TO-262
TO-263(MP-25ZK)
TO-263(MP-25ZJ)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
VDSS
VGSS
Drain Current (DC) (TC = 25°C)
Drain Current (Pulse) Note
ID(DC)
ID(pulse)
Total Power Dissipation (TA = 25°C) PT1
Total Power Dissipation (TC = 25°C) PT2
20
±20
±35
±140
1.5
40
Channel Temperature
Storage Temperature
Tch 150
Tstg 55 to +150
Note PW 10 µs, Duty Cycle 1%
V
V
A
A
W
W
°C
°C
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D14063EJ2V0DS00 (2nd edition)
Date Published May 2001 NS CP(K)
Printed in Japan
The mark  shows major revised points.
©
1999, 2000


K3296 데이터시트, 핀배열, 회로
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ELECTRICAL CHARACTERISTICS(TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Drain Leakage Current
IDSS VDS = 20 V, VGS = 0 V
Gate Leakage Current
IGSS VGS = ±20 V, VDS = 0 V
Gate Cut-off Voltage
Forward Transfer Admittance
VGS(off)
| yfs |
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 18 A
Drain to Source On-state Resistance
RDS(on)1
VGS = 10 V, ID = 18 A
RDS(on)2
VGS = 4.5 V, ID = 18 A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
VDS = 10 V
VGS = 0 V
f = 1 MHz
VDD = 10 V , ID = 18 A
VGS(on) = 10 V
RG = 10
VDD = 16 V
Gate to Source Charge
Gate to Drain Charge
Diode Forward Voltage
QGS
QGD
VF(S-D)
VGS = 10 V
ID = 35 A
IF = 35 A, VGS = 0 V
Reverse Recovery Time
Reverse Recovery Charge
trr IF = 35 A, VGS = 0 V
Qrr di/dt = 100 A/µs
2SK3296
MIN.
1.0
9.0
TYP.
8.5
12
1300
570
300
70
1220
100
180
30
4.5
8.0
1.0
35
23
MAX.
10
±10
2.5
12
19
UNIT
µA
µA
V
S
m
m
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 SWITCHING TIME
D.U.T.
RG
PG.
VGS
0
τ
τ = 1µs
Duty Cycle 1%
RL VGS
VGS
Wave Form
10%
0
VGS(on) 90%
VDD
ID 90%
ID 0 10%
Wave Form
ID
90%
10%
td(on) tr td(off) tf
ton toff
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
IG = 2 mA
PG. 50
RL
VDD
2 Data Sheet D14063EJ2V0DS




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