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PDF 74HCT162 Data sheet ( Hoja de datos )
| Número de pieza | 74HCT162 | |
| Descripción | Presettable synchronous BCD decade counter synchronous reset | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT162
Presettable synchronous BCD
decade counter; synchronous reset
Product specification
File under Integrated Circuits, IC06
December 1990
1 page  
Philips Semiconductors
Presettable synchronous BCD decade
counter; synchronous reset
Product specification
74HC/HCT162
Fig.5 State diagram.
Fig.6 Typical timing sequence: reset outputs to zero; preset to BCD seven; count to eight, nine, zero, one, two
and three; inhibit.
December 1990
5
5 Page 
Philips Semiconductors
Presettable synchronous BCD decade
counter; synchronous reset
Product specification
74HC/HCT162
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.11 Waveforms showing the MR set-up and hold times.
The shaded areas indicate when the input is permitted
to change for predictable output performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.12 Waveforms showing the CEP and CET set-up and hold times.
APPLICATION INFORMATION
The HC/HCT162 facilitate designing counters of any modulus with minimal external logic.
The output is glitch-free due to the synchronous reset.
Fig.13 Modulo-5 counter.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet 74HCT162.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
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| 74HCT162 | Presettable synchronous BCD decade counter synchronous reset | Philips |
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