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PDF 74HC4516 Data sheet ( Hoja de datos )
| Número de pieza | 74HC4516 | |
| Descripción | Binary up/down counter | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4516
Binary up/down counter
Product specification
File under Integrated Circuits, IC06
December 1990
1 page  
Philips Semiconductors
Binary up/down counter
Product specification
74HC/HCT4516
Fig.6 Logic diagram.
December 1990
5
5 Page 
Philips Semiconductors
Binary up/down counter
AC WAVEFORMS
Product specification
74HC/HCT4516
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7
Waveforms showing the clock (CP) to
output (Qn) and terminal count (TC)
propagation delays, the clock pulse width
and the maximum clock pulse frequency.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.8
Waveforms showing the set-up and hold
times form count enable (CE) and up/down
(UP/DN) control inputs to the clock pulse
(CP), the propagation delays from UP/DN,
CE to TC.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.9 Waveforms showing the preset enable
pulse width, preset enable to output
delays and output transition times.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.10 Waveforms showing the master reset pulse,
master reset to terminal count and Qn
delay and master reset to clock removal
time.
December 1990
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet 74HC4516.PDF ] | |
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