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74F583 반도체 회로 부품 판매점

4-Bit BCD Adder



Fairchild 로고
Fairchild
74F583 데이터시트, 핀배열, 회로
April 1988
Revised March 1999
74F583
4-Bit BCD Adder
General Description
The ’F583 high-speed 4-bit, BCD full adder with internal
carry lookahead accepts two 4-bit decimal numbers (A0
A3, B0–B3) and a Carry Input (Cn). It generates the decimal
sum outputs (S0–S3), and a Carry Output (Cn+4) if the sum
is greater than 9. The 'F583 is the functional equivalent of
the 82S83.
Features
s Adds two decimal numbers
s Full internal lookahead
s Fast ripple carry for economical expansion
s Sum output delay time 16.5 ns max
s Ripple carry delay time 8.5 ns max
s Input to ripple delay time 14.0 ns max
s Supply current 60 mA max
Ordering Code:
Order Number
74F583SC
74F583PC
Package Number
Package Description
M16B
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Logic Symbols
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
Pin
Names
A0–A3
B0–B3
Cn
S0–S3
Cn+4
74F
Description
U.L.
Input IIH/IIL
HIGH/LOW Output IOH/IOL
A Operand Inputs 1.0/2.0 20 µA/1.2 mA
B Operand Inputs 1.0/2.0 20 µA/1.2 mA
Carry Input
1.0/1.0 20 µA/0.6 mA
Sum Outputs
50/33.3 1 mA/20 mA
Carry Output
50/33.3 1 mA/20 mA
© 1999 Fairchild Semiconductor Corporation DS009570.prf
www.fairchildsemi.com


74F583 데이터시트, 핀배열, 회로
Functional Description
The ’F583 4-bit binary coded (BCD) full adder performs the
addition of two decimal numbers (A0–A3, B0–B3). The loo-
kahead generates the BCD carry terms internally, allowing
the 'F583 to then do BCD addition correctly. For BCD num-
bers 0 through 9 at A and B inputs, the BCD sum forms at
the output. In the addition of two BCD numbers totalling a
number greater than 9, a valid BCD number and a carry will
result.
Logic Diagram
For input values larger than 9, the number is converted
from binary to BCD. Binary to BCD conversion occurs by
grounding one set of inputs, An or Bn, and applying any 4-
bit binary number to the other set of inputs. If the input is
between 0 and 9, a BCD number occurs at the output. If
the binary input falls between 10 and 15, a carry term is
generated. Both the carry term and the sum are the BCD
equivalent of the binary input. Converting binary numbers
greater than 16 may be achieved through cascading
'F583s.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
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