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74F583 반도체 회로 부품 판매점

4-bit BCD adder



Philips 로고
Philips
74F583 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74F583
4-bit BCD adder
Product specification
IC15 Data Handbook
Philips
Semiconductors
1989 Apr 06


74F583 데이터시트, 핀배열, 회로
Philips Semiconductors
4-bit BCD adder
Product specification
74F583
FEATURES
Adds two decimal numbers
Full internal look-ahead
Fast ripple carry for economical expansion
Sum output delay 19.5 ns max.
Ripple carry delay 8.5 ns max.
Input to ripple delay 13.0 ns max.
Supply current 60 mA max.
DESCRIPTION
The 74F583 4-bit coded (BCD) full adder performs the addition of
two decimal numbers (A0–A3, B0–B3). The look-ahead generates
BCD carry terms internally, allowing the 74F583 to then do BCD
addition correctly. For BCD numbers 0 through 9 at A and B inputs,
the BCD sum forms at the output.
In addition of two BCD numbers totalling a number greater than 9, a
valid BCD number and carry will result. For input values larger than
9, the number is converted from binary to BCD. Binary to BCD
conversion occurs by grounding one set of inputs, An or Bn, and
applying a 4-bit binary number to the other set of inputs. If the input
is between 0 and 9, a BCD number occurs at the output. If the
binary input falls between 10 and 15, a carry term is generated. Both
the carry term and the sum are the BCD equivalent of the binary
input. Converting binary numbers greater than 16 may be achieved
by cascading 74F583s.
PIN CONFIGURATION
B1 1
B2 2
B3 3
A3 4
Cn 5
Cn+4 6
S2 7
GND 8
16 VCC
15 A2
14 A1
13 A0
12 B0
11 S0
10 S1
9 S3
SF01436
TYPE
74F583
TYPICAL
PROPAGATION
DELAY
9.0 ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
45 mA
ORDERING INFORMATION
PACKAGE
16-pin plastic DIP
COMMERCIAL RANGE
VCC = 5 V ±10%
Tamb = 0°C to +70°C
N74F583N
16-pin plastic SO
N74F583D
DRAWING
NUMBER
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH / LOW
A0–A3
A operand inputs
1.0 / 2.0
B0–B3
B operand inputs
1.0 / 2.0
Cn
Cn+4
S0–S3
Carry input
Carry output
Sum outputs
1.0 / 1.0
50 / 33
50 / 33
NOTE:
One (1.0) FAST Unit Load is defined as 20 µA in the High state and 0.6 mA in the Low state.
LOAD VALUE
HIGH / LOW
20 µA / 1.2 mA
20 µA / 1.2 mA
20 µA / 0.6 mA
1.0 mA / 20 mA
1.0 mA / 20 mA
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
13 12 14 1 15 2 4 3
A0 B0 A1 B1 A2 B2 A3 B3
5 Cn
Cn+4
S0 S1 S2 S3
6
VCC = Pin 16
GND = Pin 8
11 10 7 9
SF01437
Σ (BCD)
13
0
14
15 P
4
3
11
0
10
12 0 Σ
7
1
9
2 Q3
3
3
5
CI
6
CO
SF01438
1989 Apr 06
2 853–1245 96263




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