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ST Microelectronics |
. HIGH SPEED
tPD = 18 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 4028B
M54HC4028
M74HC4028
BCD TO DECIMAL DECODER
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC4028F1R M74HC4028M1R
M74HC4028B1R M74HC4028C1R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC4028 is a high speed CMOS BCD-
TO-DECIMAL DECODER fabricated in silicon gate
C2MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption. A BCD code applied to the four
inputs (A to D) provides a high level at the selected
one of the decimal decoded outputs. An illegal BCD
code such as eleven to fifteen gives a low level at
all outputs. The device also can be used as 3-TO-
8-LINE DECODER, when D input is assigned as a
disable input. The device is useful for code conver-
sion, address decoding, memory selection, demulti-
plexing, or read out decoding.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
October 1992
NC =
No Internal
Connection
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M54/M74HC4028
TRUTH TABLE
INPUTS
DCB
LLL
LLL
LLH
LLH
L HL
L HL
L HH
L HH
HL L
HL L
HXH
HHX
X: DON’T CARE
OUTPUTS
SELECTED
A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 OUTPUTT
LHL L LL L L L L L
Y0
HLHL LL L L L L L
Y1
L L LHL L L L L L L
Y2
HL L LHL L L L L L
Y3
L L L L LHL L L L L
Y4
HL L L LLHL L L L
Y5
L L L L L L LHL L L
Y6
HL L L LL L LHL L
Y7
L L L L L L L L LHL
Y8
HL L L LL L L L LH
Y9
XLLLLLLLLLL
NOTE
XLLLLLLLLLL
NOTE
LOGIC DIAGRAM
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