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M74HC1520C1R 반도체 회로 부품 판매점

HC4518 DUAL DECADE COUNTER HC4520 DUAL 4 BIT BINARY COUNTER



ST Microelectronics 로고
ST Microelectronics
M74HC1520C1R 데이터시트, 핀배열, 회로
M54/M74HC4518
M54/M74HC4520
HC4518 DUAL DECADE COUNTER
HC4520 DUAL 4 BIT BINARY COUNTER
. HIGH SPEED
fMAX = 55 MHz (TYP.) at VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
4520B/4518B
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCXXXXF1R M74HCXXXXM1R
M74HCXXXXB1R M74HCXXXXC1R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC4518/4520 are high speed CMOS
DUAL 4 BIT BINARY COUNTERS fabricated in sili-
con gate C2MOS technology. They have the same
high speed performance of LSTTL combined with
true CMOS low power consumption.
They consists of two identical internally syn-
chronous 4-stage counters. The counter stages are
D-type flip-flops having interchangeable Clock and
ENABLE inputs for incrementing on either the posi-
tive-going or negative-going transition.
For single-unit operation the ENABLE input is main-
tained ”high” and the counter advances on each
positive-going transition of the CLOCK. The
counters are cleared by high levels on their clear
lines. The counter can be cascaded in the ripple
mode by connecting Q4 to the enable input of the
subsequent counter while the clock input of the latter
is held permanently low.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
March 1993
NC =
No Internal
Connection
1/13


M74HC1520C1R 데이터시트, 핀배열, 회로
M54/M74HC4518/4520
LOGIC DIAGRAM (1/2 HC4518)
LOGIC DIAGRAM (1/2 HC4520)
2/13




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M74HC1520C1R

HC4518 DUAL DECADE COUNTER HC4520 DUAL 4 BIT BINARY COUNTER - ST Microelectronics