74VHCT74ATTR 반도체 회로 부품 판매점
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
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 STMicroelectronics |
® 74VHCT74A
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
s HIGH SPEED:
fMAX =160 MHz (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT74A is an advanced high-speed
CMOS DUAL D-TYPE FLIP FLOP WITH
PRESET AND CLEAR fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology.
A signal on the D INPUT is transfered to the Q
OUTPUT during the positive going transition of
SOP
TSSOP
PACKAGE
SOP
TSSOP
ORDER CODES
T UB E
T&R
74VHCT74AM 74VHCT74AMTR
74VHCT74ATTR
the clock pulse.
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
March 2000
1/10
74VHCT74A
INPUT EQUIVALENT CIRCUIT
TRUTH TABLE
CLR
L
H
L
H
H
H
X:Don’t Care
INPUTS
PR
H
L
L
H
H
H
D
X
X
X
L
H
X
LOGIC DIAGRAM
PIN DESCRIPTION
PIN No
1, 13
2, 12
3, 11
4, 10
5, 9
6, 8
7
14
S YM BO L
1CLR,
2CLR
1D, 2D
1CK, 2CK
1PR, 2PR
1Q, 2Q
1Q, 2Q
GND
VCC
NAME AND FUNCTION
Asyncronous Reset -
Direct Input
Data Input
Clock Input
(LOW-to-HIGH, Edge-
Triggered)
Asyncronous Set - Direct
Input
True Flip-Flop Outputs
Complement Flip-Flop
Outputs
Ground (0V)
Positive Supply Voltage
OUT PUT S
CK Q
Q
XLH
XH L
XHH
LH
HL
Qn Qn
F UNCTION
CLEAR
PRESET
NO CHANGE
Thislogic diagram has notbe used to estimate propagation delays
2/10
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