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MF-156DS-R13-170 반도체 회로 부품 판매점

SONET/SDH TRANSMITTER & RECIEVER



Mitsubishi 로고
Mitsubishi
MF-156DS-R13-170 데이터시트, 핀배열, 회로
MITSUBISHI (OPTICAL DEVICES)
MF-156DF-T12-20x/29x/23x
MF-156DS-R13-17x
SONET/SDH TRANSMITTER & RECIEVER
DESCRIPTION
This product is designed to provide high optical
performance for SDH STM-1/SONET OC-3.
Transmitter uses uncooled laser in a hermetic pigtail
coaxial module with drivered by specific integrated
circuit.
Receiver uses PIN preamp in a hermetic pigtail
coaxial module and integrated circuits for reshaping,
retiming and regenerating optical signal.
FEATURES
SONET,SDH system from intra-office to long-
leach application fully line up
Low cost and Low power consumption
Multisourced 20-Pin DIP with pigtail fiber
Single +5V power supply and P-ECL compatible
input and output
Operating case temperature range -40 to 85°C
With clock recovery and digital alarm function
APPLICATION
Short haul and long haul telecommunication systems
for SDH STM-1 / SONET OC-3.
ABSOLUTE MAXIMUM RATINGS
Stress below listed absolute maximum rating may cause permanent damage to the module.
Th is is a stress o nly and functional operation of the module at these or any other conditions in excess of those
given in the operational sections of this data sheet.
Exposure to Absolute Maximum Rating for extended periods may affect module reliability.
(TC=25°C)
Parameters
Symbol
Ratings
Unit
Supply voltage
Vcc
+6 to 0
V
PECL high output current
-
-50 to 0
mA
PECL input voltage
Storage temperature
Operating case temperature
Soldering Temperature
Soldering Time
-
0 to Vcc+0.4
V
Tstg
-40 to 85
°C
Tc
-40 to 85
°C
-
+260
°C
- 10 sec
Relative humidity(non condensation)
-
10 to 80
%
Fiber bend radius from package
rF
32 mm


MF-156DS-R13-170 데이터시트, 핀배열, 회로
MITSUBISHI (OPTICAL DEVICES)
MF-156DF-T12-20x/29x/23x
MF-156DS-R13-17x
SONET/SDH TRANSMITTER & RECIEVER
ELECTRICAL CHARACTERISTICS
All parameters are specified over the operating case temperature.
Measurement conditions are at 155.52Mb/s+/-20ppm, NRZ PN223-1 and 50% duty cycle data signal.
The DATA input/output and CLOCK output signal levels are PECL compatible.
The transmitter disable input signal level is CMOS/TTL compatible.
The Signal Detect output signal level is PECL level compatible.
Transmitter
Parameters
Supply voltage
Power consumption
PECL input voltage
Transmitter Disable voltage
Transmitter Enable voltage
Laser bias monitor voltage
Laser backface monitor voltage
Receiver
Condition
-
-
note 1
note 2
note 2
note 3
note 3
Symbol
Vcc
Pc
-
Vd
Ve
Vb
Vbf
Min.
4.75
-
Vcc-2.0V
0
0.01
0.01
Typ.
5.0
0.5
PECL
-
-
-
-
Max.
5.25
1.3
Vcc
0.8
0.45
0.20
Unit
V
W
-
V
V
V
V
Parameters
Supply voltage
Power consumption
PECL input voltage
Data/Clock external Load
Data to clock phase
Clock duty
Jitter
Signal Detect Response Time:
Decreasing Light Input
Signal Detect Response Time:
Increasing Light Input
Photo Bias Current Responsity
Condition
-
-
note 4,5
note 4
note 6
note 6
-
note 5,7
note 5,7
note 8
Symbol
Vcc
Pc
-
RI
Tcda
-
-
SDRTd
SDRTi
PBr
Min.
4.75
-
-800
45
Typ.
5.0
1.0
PECL
50
-
-
ITU Rec.compliant
Max.
5.25
1.5
800
55
- - 100
Unit
V
W
-
ohm
psec.
%
-
us
- - 100 us
0.6 - - A/W




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