|
|
PDF MH16M40AJD-6 Data sheet ( Hoja de datos )
| Número de pieza | MH16M40AJD-6 | |
| Descripción | FAST PAGE MODE ( 16 /777 /216-WORD BY 40-BIT ) DYNAMIC RAM | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MH16M40AJD-6 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
Preliminary Spec.
MITSUBISHI LSIs
Some of contents are subject to change without notice.
MH16M40AJD -6
Proto-2
FAST PAGE MODE ( 16,777,216-WORD BY 40-BIT ) DYNAMIC RAM
DESCRIPTION
The MH16M40AJD is a 16M word by 40-bit dynamic
RAM module and consists of 10 industry standard
16M X 4 dynamic RAMs in a TSOP package.
The ICs are mounted on both sides of two small PC
boards (Ceracom) with the flash gold plating and form
a convenient 69-pin WDIP package.
FEATURES
Type name
MH16M40AJD-6
RAS
CAS Address OE Cycle Power
access access access access
dissipa-
time
time time
time
time
tion
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW)
60 15 30 15 110 2500
Utilizes industry standard 16M X 4 DRAMs in TSOP package
Low stand-by power dissipation
13mW (Max) ............................ CMOS lnput level
Low operating power dissipation
MH16M40AJD - 6 ........................ 3242 mW (Max)
Fast-page mode , Read-modify-write,RAS-only refresh
CAS before RAS refresh, Hidden refresh capabilities
Early-write mode and OE to control output buffer impedance
All inputs, output TTL compatible and low capacitance
4096 refresh cycles every 64ms (A0 - A12) (CbR only)
Includes (0.22uF x 12) decoupling capacitors
5.0V ± 5% Vcc
3.3V Vdd by onboard mounted regulators
TTL input converted to LVTTL by onboard mounted level
shifters.
APPLICATION
Main memory unit for computers, Microcomputer memory,
Refresh memory for CRT
PIN DESCRIPTION
Pin Name Function
A0-A12
Address Inputs
DQ1-DQ40 Data Inputs / Outputs
RAS 0
Row Address Strobe Input
CAS 0
Column Address Strobe Input
W 0 Write Control Input
OE 0
Output Enable Input
Vcc Power Supply (+5V)
Vss Ground (0V)
PIN CONFIGURATION ( TOP VIEW )
DQ1 1
DQ2 2
DQ3 3
DQ4 4
DQ5 5
DQ6 6
Vss 7
DQ7 8
DQ8 9
DQ9 10
DQ10 11
DQ11 12
DQ12 13
DQ13 14
Vcc 15
DQ14 16
/CAS0 17
/RAS0 18
DQ15 19
DQ16 20
DQ17 21
/W0 22
NC 23
DQ18 24
DQ19 25
Vss 26
DQ20 27
A0 28
A1 29
A2 30
A3 31
A4 32
A5 33
A6 34
69 Key Pin
68 Vss
67 DQ40
66 DQ39
65 DQ38
64 DQ37
63 DQ36
62 Vcc
61 DQ35
60 DQ34
59 DQ33
58 DQ32
57 DQ31
56 DQ30
55 DQ29
54 Vss
53 DQ28
52 NC
51 NC
50 DQ27
49 DQ26
48 DQ25
47 /OE0
46 NC
45 DQ24
44 DQ23
43 Vcc
42 DQ22
41 DQ21
40 A12
39 A11
38 A10
37 A9
36 A8
35 A7
MIT - DS - 0069 -1.1
MITSUBISHI
ELECTRIC
(1 / 17 )
31/ Jan./1997
1 page  
Preliminary Spec.
MITSUBISHI LSIs
Some of contents are subject to change without notice.
MH16M40AJD -6
Proto-2
FAST PAGE MODE ( 16,777,216-WORD BY 40-BIT ) DYNAMIC RAM
Read and Refresh Cycles
Symbol
Parameter
tRC Read cycle time
tRAS RAS iow pulse width
tCAS CAS iow pulse width
tCSH CAS hold time after RAS iow
tRSH RAS hold time after CAS iow
tRCS Read Setup time after CAS high
tRCH Read hold time after CAS iow
tRRH Read hold time after RAS iow
tRAL Column address to RAS hold time
tOCH CAS hold time after OE iow
tORH RAS hold time after OE iow
(Note 20)
(Note 20)
Note 20: Either tRCH or tRRH must be satisfied for a read cycle.
Limits
-6
Min Max
110
60 10000
15 10000
60
15
0
0
10
30
15
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle (Early Write and Delayed Write)
Symbol
Parameter
tWC
tRAS
tCAS
tCSH
tRSH
tWCS
tWCH
tCWL
tRWL
tWP
tDS
tDH
tOEH
Write cycle time
RAS iow pulse width
CAS iow pulse width
CAS hold time after RAS iow
RAS hold time after CAS iow
Write setup time before CAS low
(Note 22)
Write hold time after CAS iow
CAS hold time after W iow
RAS hold time after W iow
Write pulse width
Data setup time before CAS iow or W iow
Data hold time after CAS iow or W iow
OE hold time after W iow
Limits
-6
Min Max
110
60 10000
15 10000
60
15
0
10
15
15
10
0
10
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIT - DS - 0069 -1.1
MITSUBISHI
ELECTRIC
(5 / 17 )
31/ Jan./1997
5 Page 
Preliminary Spec.
MITSUBISHI LSIs
Some of contents are subject to change without notice.
MH16M40AJD -6
Proto-2
FAST PAGE MODE ( 16,777,216-WORD BY 40-BIT ) DYNAMIC RAM
CAS before RAS Refresh Cycle
RAS
VIH
VIL
CAS
VIH
VIL
A0 - A12
VIH
VIL
VIH
W
VIL
tRP
tRPC tCSR
tCPN
tRCH tRSR
tRC
tRAS
tRC
tRAS
tRP
tCHR
tRPC tCSR
tCHR
tRPC
tCRP
tRHR
tRSR
tRHR
tASR
ROW
COLUMN
ADDRESS ADDRESS
tRCS
DQ
(INPUTS)
VIH
VIL
DQ VOH
(OUTPUTS) VOL
VIH
OE
VIL
tOFF
tOEZ
Hi-Z
MIT - DS - 0069 -1.1
MITSUBISHI
ELECTRIC
(11 / 17 )
31/ Jan./1997
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet MH16M40AJD-6.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MH16M40AJD-6 | FAST PAGE MODE ( 16 /777 /216-WORD BY 40-BIT ) DYNAMIC RAM | Mitsubishi |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |