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ON Semiconductor |
MC14020B
14-Bit Binary Counter
The MC14020B 14–stage binary counter is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. This part is designed with an input wave shaping
circuit and 14 stages of ripple–carry binary counter. The device
advances the count on the negative–going edge of the clock pulse.
Applications include time delay circuits, counter controls, and
frequency–dividing circuits.
• Fully Static Operation
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Buffered Outputs Available from stages 1 and 4 thru 14
• Common Reset Line
• Pin–for–Pin Replacement for CD4020B
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note NO TAG)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
– 0.5 to +18.0
– 0.5 to VDD + 0.5
V
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10 mA
PD Power Dissipation,
500 mW
per Package (Note NO TAG)
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8–Second Soldering)
– 55 to +125
– 65 to +150
260
°C
°C
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v vhigh–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC14020BCP
AWLYYWW
1
SOIC–16
D SUFFIX
CASE 751B
16
14020B
AWLYWW
1
TSSOP–16
DT SUFFIX
CASE 948F
16
14
020B
ALYW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14020B
AWLYWW
1
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14020BCP
PDIP–16
2000/Box
MC14020BD
SOIC–16
48/Rail
MC14020BDR2 SOIC–16 2500/Tape & Reel
MC14020BDT
TSSOP–16
96/Rail
MC14020BF
SOEIAJ–16 See Note 1.
MC14020BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC14020B/D
CLOCK
10
RESET
11
MC14020B
PIN ASSIGNMENT
Q12 1
Q13 2
Q14 3
Q6 4
Q5 5
Q7 6
Q4 7
VSS 8
16 VDD
15 Q11
14 Q10
13 Q8
12 Q9
11 R
10 C
9 Q1
TRUTH TABLE
Clock
X
Reset
0
0
1
Output State
No Change
Advance to Next State
All Outputs are Low
X = Don’t Care
LOGIC DIAGRAM
Q1 Q4 Q5 Q12 Q13 Q14
9 75
123
CQ
CRQ
CQ
C RQ
CQ
C RQ
CQ
C RQ
CQ
C RQ
CQ
CR
Q6 = PIN 4
Q7 = PIN 6
Q8 = PIN 13
Q9 = PIN 12
Q10 = PIN 14
Q11 = PIN 15
VDD = PIN 16
VSS = PIN 8
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