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PDF MC-4R128FKK6K Data sheet ( Hoja de datos )
| Número de pieza | MC-4R128FKK6K | |
| Descripción | 128MB 32-bit Direct Rambus DRAM RIMM Module | |
| Fabricantes | Elpida Memory | |
| Logotipo |  |
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PRELIMINARY DATA SHEET
128MB 32-bit Direct Rambus DRAM RIMM Module
MC-4R128FKK6K (32M words × 16 bits × 2 channels)
Description
The 32-bit Direct Rambus RIMM module is a general-
purpose high-performance lines of memory modules
suitable for use in a broad range of applications
including computer memory, personal computers,
workstations, and other applications where high
bandwidth and latency are required.
The 32-bit RIMM module consists of 288Mb Direct
Rambus DRAM (Direct RDRAM) devices. These are
extremely high-speed CMOS DRAMs organized as
16M words by 18 bits. The use of Rambus Signaling
Level (RSL) technology permits the use of conventional
system and board design technologies. The 32-bit
RIMM modules support 800MHz transfer rate per pin,
resulting in total module bandwidth of 3.2GB/s.
Features
• 128MB Direct RDRAM storage and 128 banks total
on module
• 2 independent Direct RDRAM channels, 1 pass
through and 1 terminated on 32-bit RIMM module
• High speed 800MHz Direct RDRAM devices
• 232 edge connector pads with 1mm pad spacing
Module PCB size: 133.35mm × 39.925mm ×
1.27mm
Gold plated edge connector pads contacts
• Serial Presence Detect (SPD) support
• Operates from a 2.5V (±5%) supply
• Low power and power down self refresh modes
• Separate Row and Column buses for higher
efficiency
The 32-bit RIMM module provides two independent 16
bit memory channels to facilitate compact system
design. The "Thru" Channel enters and exits the
module to support a connection to or from a controller,
memory slot, or termination. The "Term" Channel is
terminated on the module and supports a connection
from a controller or another memory slot.
The RDRAM architecture enables the highest
sustained bandwidth for multiple, simultaneous,
randomly addressed memory transactions. The
separate control and data buses with independent row
and column control yield over 95% bus efficiency. The
RDRAM device multi-bank architecture supports up to
four simultaneous transactions per device.
Document No. E0269N10 (Ver. 1.0)
Date Published April 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2002
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
1 page  
MC-4R128FKK6K
Signal
ROW2_THRU_R..
ROW0_THRU_R
Module
connector pads
A52, B50, A50
SCK_THRU_L
A2
I/O
I
I
SCK_THRU_R
A71
I
SIN_THRU
B34
I/O
SOUT_THRU
A34
I/O
CFM_TERM
B103
I
CFMN_TERM
B101
I
CMD_TERM
COL4_TERM..
COL0_TERM
CTM_TERM_L
A115
I
B97, A97, B95, A95,
B93
I
B73 I
CTM_TERM_R
A103
I
CTMN_TERM_L B71
I
CTMN_TERM_R A105
I
DQA8_TERM..
DQA0_TERM
DQB8_TERM..
DQB0_TERM
ROW2_TERM..
ROW0_TERM
B113, A113, B111,
A111, B109, A109, I/O
B107, A107, B105
A85, B85, A87, B87,
A89, B89, A91, B91, I/O
A93
A101, B99, A99
I
SCK_TERM
B115
I
SIN_TERM
VTERM
B83 I/O
A60, B60, A61, B61
Type
RSL
VCMOS
VCMOS
VCMOS
VCMOS
RSL
RSL
VCMOS
RSL
RSL
RSL
RSL
RSL
RSL
RSL
RSL
VCMOS
VCMOS
Description
Row bus. 3-bit bus containing control and address information
for row accesses. Connects to right RDRAM device on "Thru"
Channel.
Serial Clock input. Clock source used to read from and write
to "Thru" Channel RDRAM control registers. Connects to left
RDRAM device on "Thru" Channel.
Serial Clock input. Clock source used to read from and write
to "Thru" Channel RDRAM control registers. Connects to right
RDRAM device on "Thru" Channel.
"Thru" Channel Serial I/O for reading from and writing to the
control registers. Attaches to SIO0 of right RDRAM device on
"Thru" Channel.
"Thru" Channel Serial I/O for reading from and writing to the
control registers. Attaches to SIO1 of left RDRAM device on
"Thru" Channel.
Clock from master. Connects to right RDRAM device on
"Term" Channel. Interface clock used for receiving RSL
signals from the controller. Positive polarity.
Clock from master. Connects to right RDRAM device on
"Term" Channel. Interface clock used for receiving RSL
signals from the controller. Negative polarity.
Serial Command Input used to read from and write to the
control registers. Also used for power management.
Connects to right RDRAM device on "Term" Channel.
"Term" Channel Column bus. 5-bit bus containing control and
address information for column accesses. Connects to right
RDRAM device on "Term" Channel.
Clock To Master. Connects to left RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Positive polarity.
Clock To Master. Connects to right RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Positive polarity.
Clock To Master. Connects to left RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Negative polarity.
Clock To Master. Connects to right RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Negative polarity.
"Term" Channel Data bus A. A 9-bit bus carrying a byte of
read or write data between the controller and RDRAM devices
on “Term” Channel. Connects to right RDRAM device on
"Term" Channel. DQA8_TERM is non-functional on modules.
"Term" Channel Data bus B. A 9-bit bus carrying a byte of
read or write data between the controller and RDRAM devices
on “Term” Channel. Connects to right RDRAM device on
"Term" Channel. DQB8_TERM is non-functional on modules.
"Term" Channel Row bus. 3-bit bus containing control and
address information for row accesses. Connects to right
RDRAM device on "Term" Channel.
Serial Clock input. Clock source used to read from and write
to "Term" Channel RDRAM control registers. Connects to
right RDRAM device on "Term" Channel.
"Term" Channel Serial I/O for reading from and writing to the
control registers. Attaches to SIO0 of left RDRAM device on
"Term" Channel.
"Term" Channel Termination voltage.
Preliminary Data Sheet E0269N10 (Ver. 1.0)
5
5 Page 
Physical Outline
A
Pad A1
C
D
H
MC-4R128FKK6K
B
E
F
J Pad A116 G
K
Item Description
A PCB length
min. typ. max.
133.22 133.35 133.48
Unit
mm
B PCB height
34.795 34.925 35.055 mm
C Center-center pad width from pad A1 to A60,
B1 to B60
D Spacing from PCB left edge to connector key notch
- 59.00 -
- 78.170 -
mm
mm
E Spacing from contact pad PCB edge
to side edge retainer notch
F PCB thickness
- 17.78 -
1.17 1.27 1.37
mm
mm
G Heat spreader thickness from PCB surface (one side) to -
- 3.09 mm
heat spreader top surface
H Center-center pad width from pad A61 to A68,
- 7.00 -
mm
B61 to B68
J Center-center pad width from pad A69 to A116,
- 47.00 -
mm
B69 to B116
K RIMM thickness
- - 4.46 mm
ECA-TS2-0065-01
Preliminary Data Sheet E0269N10 (Ver. 1.0)
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet MC-4R128FKK6K.PDF ] | |
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