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PDF ZVNL120A Data sheet ( Hoja de datos )
| Número de pieza | ZVNL120A | |
| Descripción | N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET | |
| Fabricantes | Zetex Semiconductors | |
| Logotipo |  |
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N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – MARCH 94
FEATURES
* 200 Volt VDS
* RDS(on)=10Ω
* Low threshold
ZVNL120A
APPLICATIONS
* Telephone handsets
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at Tamb=25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
D
G
S
E-Line
TO92 Compatible
VALUE
200
180
2
± 20
700
-55 to +150
UNIT
V
mA
A
V
mW
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BVDSS 200
V ID=1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th) 0.5 1.5 V
ID=1mA, VDS= VGS
Gate-Body Leakage
IGSS
100 nA VGS=± 20V, VDS=0V
Zero Gate Voltage Drain
Current
IDSS
10 µA
100 µA
VDS=200 V, VGS=0
VDS=160 V, VGS=0V, T=125°C(2)
On-State Drain Current(1)
ID(on)
500
mA VDS=25 V, VGS=5V
Static Drain-Source On-State RDS(on)
Resistance (1)
10 Ω
10 Ω
VGS=5V,ID=250mA
VGS=3V, ID=125mA
Forward Transconductance
(1)(2)
gfs
200
mS VDS=25V,ID=250mA
Input Capacitance (2)
Common Source Output
Capacitance (2)
Ciss
Coss
85 pF
20 pF VDS=25 V, VGS=0V, f=1MHz
Reverse Transfer Capacitance Crss
(2)
7 pF
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
td(on)
tr
td(off)
tf
8 ns
8 ns VDD ≈25V, ID=250mA
20 ns
12 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
3-401
1 page | ||
| Páginas | Total 3 Páginas | |
| PDF Descargar | [ Datasheet ZVNL120A.PDF ] | |
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