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PDF ZVN4106F Data sheet ( Hoja de datos )
| Número de pieza | ZVN4106F | |
| Descripción | N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET | |
| Fabricantes | Zetex Semiconductors | |
| Logotipo |  |
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SOT23 N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – DECEMBER 1995
PARMARKING DETAIL - MZ
ZVN4106F
S
D
G
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
VALUE
UNIT
Drain-Source Voltage
VDS
60 V
Continuous Drain Current at Tamb=25°C
ID
0.2 A
Pulsed Drain Current
IDM 3 A
Gate-Source Voltage
VGS
± 20 V
Max Power Dissipation at Tamb=25°C
Ptot
330 mW
Operating and Storage Temperature Range Tj:Tstg
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BVDSS
60
V ID=1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th)
1.3
3
V ID=1mA, VDS= VGS
Gate-Body Leakage
IGSS
100 nA VGS=± 20V, VDS=0V
Zero Gate Voltage Drain
Current
IDSS
10 µA VDS=60V, VGS=0
50 µA VDS=48V, VGS=0V, T=125°C(2)
On-State Drain Current(1)
ID(on)
1
A VDS=25V, VGS=10V
Static Drain-Source On-State RDS(on)
Resistance (1)
2.5 Ω
5Ω
VGS=10V, ID=500mA
VGS=5V, ID=200mA
Forward Transconductance(1)(2gfs
)
150
mS VDS=25V, ID=250mA
Input Capacitance (2)
Common Source Output
Capacitance (2)
Ciss
Coss
35 pF
25 pF VDS=25V, VGS=0V, f=1MHz
Reverse Transfer Capacitance Crss
(2)
8 pF
Turn-On Delay Time (2)(3)
Td(on)
5 ns
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Tr
Td(off)
7 ns VDD ≈25V, ID=150mA
6 ns
Fall Time (2)(3)
Tf 8 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 500Ω source impedance and <5ns rise time on a pulse generator
Spice parameter data is available upon request for this device
3 - 399
1 page | ||
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| PDF Descargar | [ Datasheet ZVN4106F.PDF ] | |
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