WM8190 반도체 회로 부품 판매점
(8+6) Bit Output 14-bit CIS/CCD AFE/Digitiser
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 Wolfson Microelectronics plc |
WM8190
(8 + 6) Bit Output 14-bit CIS/CCD AFE/Digitiser
Advanced Information, August 1999, Rev 3.0
DESCRIPTION
The WM8190 is a 14-bit analogue front end/digitiser IC
which processes and digitises the analogue output signals
from CCD sensors or Contact Image Sensors (CIS) at pixel
sample rates of up to 6MSPS.
The device includes three analogue signal processing
channels each of which contains Reset Level Clamping,
Correlated Double Sampling and Programmable Gain and
Offset adjust functions. Three multiplexers allow single
channel processing. The output from each of these
channels is time multiplexed into a single high-speed 14-bit
Analogue to Digital Converter. The digital output data is
available in 8, 7 or 4-bit wide multiplexed format, with no
missing codes.
An internal 4-bit DAC is supplied for internal reference level
generation. This may be used during CDS to reference CIS
signals or during Reset Level Clamping to clamp CCD
signals. An external reference level may also be supplied.
ADC references are generated internally, ensuring optimum
performance from the device.
Using an analogue supply voltage of 5V and a digital
interface supply of either 5V or 3.3V, the WM8190 typically
only consumes 250mW when operating from a single
5V supply.
FEATURES
• 14-bit ADC
• No missing codes guaranteed
• 6MSPS conversion rate
• Low power – 250mW typical
• 5V single supply or 5V/3.3V dual supply operation
• Single or 3 channel operation
• Correlated double sampling
• Programmable gain (8-bit resolution)
• Programmable offset adjust (8-bit resolution)
• Programmable clamp voltage
• 8,7 or 4-bit wide multiplexed data output formats
• Internally generated voltage references
• 28-pin SOIC package
• Serial control interface
APPLICATIONS
• Flatbed and sheetfeed scanners
• USB compatible scanners
• Multi-function peripherals
• High-performance CCD sensor interface
BLOCK DIAGRAM
VRLC/VBIAS
(26)
VSMP MCLK
(5) (7)
AVDD DVDD1 DVDD2
(21) (3) (10)
VRT VRX VRB
(24) (25) (23)
RINP (1)
GINP (28)
BINP (27)
CL
RLC
RLC
RS VS
M
U
X
TIMING CONTROL
CDS
RM
GU
X
B
8
OFFSET
DAC
+ PGA
RM
GU
X
B
8
VREF/BIAS
I/P SIGNAL
POLARITY
ADJUST
CDS
+ PGA
8 OFFSET
DAC
8 I/P SIGNAL
POLARITY
ADJUST
+
M
+U
X
WM8190
14-
BIT
ADC
DATA
I/O
PORT
(4) OEB
(13) OP[0]
(14) OP[1]
(15) OP[2]
(16) OP[3]
(17) OP[4]
(18) OP[5]
(19) OP[6]
(20) OP[7]/SDO
RLC
RLC 4
DAC
CDS
+ PGA
+
8 OFFSET
DAC
8 I/P SIGNAL
POLARITY
ADJUST
CONFIGURABLE
SERIAL
CONTROL
INTERFACE
(9) SEN
(12) SCK
(11) SDI
(6) RLC/ACYC
(22)
AGND1
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: [email protected]
http://www.wolfson.co.uk
(2)
AGND2
(8)
DGND
Advanced Information data sheets contain
preliminary data on new products in the
preproduction phase of development.
Supplementary data will be published at a
later date.
©1999 Wolfson Microelectronics Ltd.
WM8190
PIN CONFIGURATION
RINP
AGND2
DVDD1
OEB
VSMP
RLC/ACYC
MCLK
DGND
SEN
DVDD2
SDI
SCK
OP[0]
OP[1]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 GINP
27 BINP
26 VRLC/VBIAS
25 VRX
24 VRT
23 VRB
22 AGND1
21 AVDD
20 OP[7]/SDO
19 OP[6]
18 OP[5]
17 OP[4]
16 OP[3]
15 OP[2]
Advanced Information
ORDERING INFORMATION
DEVICE
XWM8190CDW/V
TEMP. RANGE
0 to 70oC
PACKAGE
28-pin SOIC
PIN DESCRIPTION
PIN NAME
TYPE
DESCRIPTION
1
RINP
Analogue input Red channel input video.
2 AGND2
Supply
Analogue ground (0V).
3 DVDD1
Supply
Digital supply (5V) for logic and clock generator. This must be operated at the same
potential as AVDD.
4
OEB
Digital input Output Hi-Z control, all digital outputs disabled when OEB = 1.
5
VSMP
Digital input Video sample synchronisation pulse.
6 RLC/ACYC Digital input RLC (active high) selects reset level clamp on a pixel-by-pixel basis – tie high if
used on every pixel. ACYC autocycles between R, G, B inputs.
7
MCLK
Digital input Master clock. This clock is applied at N times the input pixel rate (N = 2, 3, 6, 8 or
any multiple of 2 thereafter depending on input sample mode).
8 DGND
Supply
Digital ground (0V).
9
SEN
Digital input Enables the serial interface when high.
10 DVDD2
Supply
Digital supply (5V/3.3V), all digital I/O pins.
11 SDI Digital input Serial data input.
12 SCK Digital input Serial clock.
Digital multiplexed output data bus.
ADC output data (d13:d0) and error flags (F) are available in three multiplexed
formats as shown, under the control of register bit MUXOP[1:0].
See ‘Output Formats’ description in Device Description section for further details.
8+6-bit
7+7-bit
4+4+4+2-bit
ABABABC
D
13
OP[0]
Digital output
d6
F
F
F
14
OP[1]
Digital output
d7
F
d7 d0
15
OP[2]
Digital output
d8
d0
d8
d1
16
OP[3]
Digital output
d9
d1
d9
d2
17
OP[4]
Digital output
d10
d2
d10
d3
d10
d6
d2
F
18
OP[5]
Digital output
d11
d3
d11
d4
d11
d7
d3
F
19
OP[6]
Digital output
d12
d4
d12
d5
d12
d8
d4 d0
20
OP[7]
Digital output
d13
d5
d13
d6
d13
d9
d5 d1
Alternatively, pin OP[7]/SDO may be used to output register read-back data when
OEB = 0 and SEN has been pulsed high. See Serial Interface description in Device
Description section for further details.
WOLFSON MICROELECTRONICS LTD
AI Rev 3.0 August 1999
2
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제조업체: Wolfson Microelectronics plc
( wolfson )
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