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PDF WM8170 Data sheet ( Hoja de datos )
| Número de pieza | WM8170 | |
| Descripción | 3.3V Integrated Signal Processor for Area Array CCDs | |
| Fabricantes | Wolfson Microelectronics plc | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de WM8170 (archivo pdf) en la parte inferior de esta página. Total 41 Páginas | ||
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WM8170
3.3V Integrated Signal Processor for Area Array CCDs
Product Preview Rev 1.0 March 2000
DESCRIPTION
The WM8170 is a 10-bit analogue front end/digitiser IC,
which processes and digitises the analogue output signals
from area array CCD sensors at pixel sample rates of up to
21MSPS.
The device contains input blanking, correlated double
sampling (CDS), programmable gain amplifier, black level
clamp, on-board voltage reference and a 10-bit, 21MSPS
ADC. Two auxiliary 8 bit DACs are provided which may be
used for bias voltage control or camera functions such as
auto-focus.
Fine black level adjustment is performed digitally after the
ADC. This digital adjustment will follow DC shifts in the video
input without introducing digital correction noise into the
image.
The WM8170 is designed to interface to a wide range of area
array CCDs and can operate at lower power for slower
sample rates by setting the reference bias current via an
external resistor connected to the ISET pin.
All signal timing within the device is derived from the CCD
clock signals. The WM8170 is controlled via a configurable
serial interface, which is compatible with all of Wolfson’s
imaging devices.
The user is able to control the device functions and monitor
on-chip register settings via the easy-to-use digital
management interface.
BLOCK DIAGRAM
VRB VMID VRT
(15) (16) (14)
BLCENB
(27)
FEATURES
• 10-bit, 21MSPS ADC
• No missing codes guaranteed
• Correlated double sampling
• Programmable gain amplifier
• Black level clamp
• Input blanking
• Two auxiliary 8-bit DACs
• Power save mode
• Serial or parallel control bus
• Adjustable sample rate
• User selectable sampling on rising or falling edge
of clocks
• Single 3.3V power supply (3V minimum)
• 48-pin TQFP package
• Standby mode ICC<10µA
• Power consumption typically 190mW at 12MHz,
270mW at 21MHz
APPLICATIONS
• Digital still cameras
• Digital camcorders
• PC cameras
• Progressive scan CCDs
• NTSC, PAL interline CCDs
SHP SHD CVDD AVDD[1-3] DVDD[1-4] DCLK
(22) (21) (42) (10,11,20) (3,23,33,39) (38)
VCLP (12)
CLPENB (24)
CLPSWB (25)
PIN (19)
DIN (18)
PBLK/HD (26)
Dual Mode Pin
VOUT1 (40)
VOUT2 (41)
REFERENCE
CLAMP
ANALOGUE
BLACK
LEVEL
CLAMP
CDS
S/H
PGA
8-BIT
ADC
8-BIT
ADC
BIAS
CIRCUIT
10-BIT
ADC
TIMING GENERATOR
DIGITAL
BLACK
LEVEL
CLAMP
AND
FILTER
DIGITAL
COMPARATOR
HI-Z
(8) PTDO
(31) OEB
DATA I/O
(1,4-7,44-48)
CONFIGURABLE
SERIAL/PARALLEL
INTERFACE
WM8170
(29) PNS
(36) SEN/STB
(37) SCK/RNW
(35) SDI/DNA
(32) NRESET
(34) SDO
(30) PDB/VD
Dual Mode Pin
(43)
CGND
(9,17)
AGND[1-2]
(13)
ISET
(2,28)
DGND[1-2]
WOLFSON MICROELECTRONICS LTD.
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: [email protected]
http://www.wolfson.co.uk
Product Preview data sheets contain
specifications for products in the formative
phase of development. These products may
be changed or discontinued without notice.
© 2000 Wolfson Microelectronics Ltd.
1 page  
WM8170
Product Preview Rev 1.0
ELECTRICAL CHARACTERISTICS
Test Characteristics
CVDD = AVDD = DVDD = 3.3V, AGND = DGND = CGND = 0V, RISET=15kΩ , TA = 0oC to +70oC, unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Digital Inputs
High level input voltage
Low level input voltage
High level input current
Low level input current
Input capacitance
Digital Outputs
VIH
VIL
IIH
IIL
CIN
0.8*DVDD
V
0.2*DVDD
V
1 µA
1 µA
5 pF
High level output voltage
Low level output voltage
High impedance O/P current
Analogue Inputs
VOH
VOL
IOZ
IOH = 1mA
IOL = 1mA
DVDD-0.6
V
0.6 V
1 µA
Input common mode range
VCMR
0.3 AVDD-0.3
10-bit ADC Performance Including CDS and PGA Functions NO MISSING CODES GUARANTEED
V
Resolution
10 Bits
Maximum differential non-
linearity
DNL
PGA at minimum gain
+/-1 LSB
Maximum integral non-
linearity
INL PGA at minimum gain
+/-2
LSB
Maximum sampling rate
CDS S/H
SMAX
21.5 MSPS
Maximum input voltage for
full scale ADC output
VINMAX
PGA = 00hex
V375
TIMES2
00
1V
01
0.5 V
Minimum input voltage for full
scale ADC output
VINMIN
10
11
PGA = FFhex
V375
TIMES2
00
1.5
0.75
40
V
V
mV
01
20 mV
10
60 mV
PGA
11
30 mV
Minimum gain
Minimum gain
Maximum gain
Maximum gain
LSB step size
Resolution
GNTMIN
GTMIN
GNTMAX
GTMAX
GLSB
TIMES2=0, V375=1
TIMES2=1, V375=1
TIMES2=0, V375=1
TIMES2=1, V375=1
0
567
27 28 29
33 34 35
0.11
8
dB
dB
dB
dB
dB
Bits
PGA maximum differential
non-linearity
PDNL
LSB
PGA maximum integral
non-linearity
PINL
LSB
WOLFSON MICROELECTRONICS LTD
PP Rev 1.0 March 2000
5
5 Page 
WM8170
Product Preview Rev 1.0
PARALLEL INTERFACE
tSTB
STB
tASU
tAH tDSU
tDH
tSTDO
tSTAO
Z
D[9:2] ADC DATA OUT
ADDRESS IN
DATA IN
Z
ADC DATA OUT
DATA OUT
ADC DATA OUT
DNA
tADLS
tADLH tADHS
tADHH
RNW
tOPZ
tOPD
Figure 6 Parallel Interface Timing Diagram
Test Characteristics
CVDD = AVDD = DVDD = 3.3V, AGND = DGND = CGND = 0V, RISET=15kΩ , TA = 0oC to +70oC, unless otherwise stated.
PARAMETER
SYMBOL
RNW low to OP[9:2] Tri-
state
Address setup time to STB
low
DNA low setup time to STB
low
STB low time
Address hold time from
STB high
DNA low hold time from
STB high
Data setup time to STB low
DNA high setup time to
STB low
Data hold time from STB
high
DNA high hold time from
STB high
RNW high to OP[9:2] output
Data output propagation
delay from STB low
ADC data out propagation
delay from STB high
tOPZ
tASU
tADLS
tSTB
tAH
tADLH
tDSU
tADHS
tDH
tADHH
tOPD
tSTDO
tSTAO
TEST
CONDITIONS
MIN
0
10
50
10
10
0
10
10
10
0
TYP
MAX
20
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WOLFSON MICROELECTRONICS LTD
PP Rev 1.0 March 2000
11
11 Page | ||
| Páginas | Total 41 Páginas | |
| PDF Descargar | [ Datasheet WM8170.PDF ] | |
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