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WM8144 반도체 회로 부품 판매점

Integrated 10-bit Data Acquisition system for Imaging Applications



Wolfson Microelectronics plc 로고
Wolfson Microelectronics plc
WM8144 데이터시트, 핀배열, 회로
WM8144-10
Production Data
October 1997 Rev. 3.0
Integrated 10-bit Data Acquisition system for
Imaging Applications
Description
Features
WM8144-10 integrates the analogue signal conditioning
required by CCD sensors with a 10-bit ADC and optional
pixel-by-pixel image compensation. WM8144-10 requires
minimal external circuitry and provides a cost effective
sensor-to-digital domain system solution.
Each analogue conditioning channel provides reset level
clamp, CDS, fine offset level shifting and gain
amplification. The three channels are multiplexed into the
ADC. Output from the ADC can either be direct or passed
through a digital post-processing function. The post-
processing provides compensation for variations in offset
and shading on a pixel-by-pixel basis.
• Reset level clamp
• Correlated Double Sampling (CDS)
• Fine offset level shifting
• Programmable Gain Amplification
• 10-Bit ADC with maximum 6 MSPS
• Digital post-processing for pixel-by-pixel
image compensation
• Simple clocking scheme
• Control by serial or parallel interface
• Time-multiplexed eight-bit data output mode
• 48 pin TQFP package
• Pin compatible with WM8144-12
The flexible output architecture allows ten-bit data to be
accessed either on a ten-bit bus or via a time-multiplexed
eight-bit bus. The WM8144-10 can be configured for pixel-
by-pixel or line-by-line multiplexing operation. Reset level
clamp and/or CDS features can be optionally bypassed.
Device configuration is either by a simple serial or eight-
bit parallel interface.
Applications
• Document scanners
• CCD sensor interfaces
• Contact image sensor (CIS) interfaces
Block Diagram
VRLC
VRU VRT
VRB VRL
VMID
VSMP MCLK RLC
AVDD AGND DVDD1 DVDD2 DGND
VMID
RINP
GINP
BINP
MUX
CL RS VS
S/H
S/H
PGA
CDS
5-BIT REG
S/H
S/H
PGA
CDS
5-BIT REG
S/H
S/H
PGA
CDS
5-BIT REG
TIMING CONTROL
OFFSET
8-BIT + SIGN
DAC
VMID
OFFSET
8-BIT + SIGN
DAC
VMID
OFFSET
8-BIT + SIGN
DAC
VMID
WM8144-10
EXTERNAL
DATA STORE
INTERFACE
M
U
X
10 BIT
ADC
IMAGE
COMPENSATION
PROCESSING
10/8
MUX
CONFIGURABLE
SERIAL/PARALLEL
CONTROL INTERFACE
CC[2:0]
DV
CDATA(7:0)
ORNG
OEB
OP[9:0]
PNS
SDI / DNA
SCK / RNW
SEN / STB
NRESET
Production Data data sheets contain fi-
nal specifications current on publication
date. Supply of products conforms to
Wolfson Microelectronics standard terms
and conditions
Wolfson Microelectronics
Lutton Court, Bernard Terrace, Edinburgh EH8 9NX, UK
Tel: +44 (0) 131 667 9386 Fax: +44 (0) 131 667 5176
www: http://www.wolfson.co.uk
© 1997 Wolfson Microelectronics


WM8144 데이터시트, 핀배열, 회로
WM8144-10
Package Outline
CDATA3
CDATA2
CDATA1
CDATA0
DGND
OP9
OP8
OP7
OP6
OP5
OP4
OP3
37
38
39
40
41
42
43
44
45
46
47
48
WM8144-10
Ordering Information
DEVICE
TEMP RANGE
WM8144-10CFT/V 00C - 700C
PACKAGE
48 Pin TQFP
24 PNS
23 RINP
22 GINP
21 BINP
20 VMID
19 VRLC
18 AGND
17 AVDD
16 VRL
15 VRU
14 VRB
13 VRT
NC - Make no external connection
Absolute Maximum Ratings
Analogue Supply Voltage. . . AGND - 0.3 V, AGND +7 V
Digital Supply Voltage. . . . DGND - 0.3 V, DGND +7 V
Digital Inputs . . . . . . . . DGND - 0.3 V, DVDD + 0.3 V
Digital Outputs. . . . . . . .DGND - 0.3 V, DVDD + 0.3 V
Reference inputs . . . . . . AGND - 0.3 V, AVDD + 0.3 V
RINP, GINP, BINP . . . . . .AGND - 0.3 V, AVDD + 0.3 V
Operating temperature range, TA . . . . . 0oC to +70oC
Storage Temperature . . . . . . . . . . -50oC to +150oC
Lead Temperature (soldering, 10 sec) . . . . . . +260oC
Note: Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by
continuously operating at or beyond these limits. Device functional operating range limits and guaranteed
performance specifications are given under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. The WM8144-10 is manufactured on a CMOS process. It is therefore generically sus-
ceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and
storage of this device.
As per JEDEC specifications A112-A and A113-A this product requires specific storage conditions prior to
surface mount assembly. It has been classified as having a Moisture Sensitivity level of 2 and as such will be
supplied in vacuum sealed moisture barrier bags.
Recommended Operating Conditions
PARAMETER
Supply Voltage
Operating Temperature Range
Input Common Mode Range
TA
VCMR
TEST CONDITIONS
MIN
4.75
0
0.5
TYP
MAX UNIT
5.25 V
70 oC
4.5 V
Wolfson Microelectronics
2




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