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PDF WM0831 Data sheet ( Hoja de datos )
| Número de pieza | WM0831 | |
| Descripción | 8-Bit ADCs with Serial Interface and Differential or Dual Inputs | |
| Fabricantes | Wolfson Microelectronics plc | |
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WM0831, WM0832
Production Data
Sept 1996 Rev 2.1
8-Bit ADCs with Serial Interface and
Differential or Dual Inputs
Description
WM0831 and WM0832 are 8-bit analogue to digital
converters (ADC) with serial I/O interfaces, providing a
choice of input configurations in 8-pin SO or DIP packages.
WM0831 has a differential input, also configurable as a
single ended input. A-D conversion results are serially
output on Data Out (DO) under the control of clock and chip
select inputs. The device has a separate voltage reference
input.
WM0832's two input multiplexer is configurable via the Data
In (DI) serial input, as two single ended inputs or a single
differential input. The voltage reference operates
ratiometrically and is internally connected to the VCC pin.
Conversion is initiated by bringing and holding chip select
low while providing a clock input. With WM0831's fixed
input configuration, the conversion result is output at DO on
the clock's falling edges in MSB to LSB order.
With WM0832's configurable input multiplexer, data is input
to DI on the rising edges of the clock to setup the Mux and
initiate conversion. Conversion results appear serially at
DO on the falling edges of the clock, first in MSB to LSB
order, and then repeated in LSB to MSB order.
WM0831/2 operate on 5V or 3.3V supply voltages and are
available in small outline and DIP packages for commercial
(0 to 70oC) and industrial (-40 to 85oC) temperature ranges.
Features
• Functionally Equivalent to National Semiconduc-
tor ADC0831 and ADC0832
• WM0831: Differential or single ended input
• WM0832: Two single ended inputs or a single
differential input
• Ratiometric reference input (fixed for WM0832)
• Serial I/O interface
• Input range 0 to Vcc with Vcc Reference
• 8 pin package, SO or DIP
• 5V and 3.3V variants
• Total Unadjusted Error: ± 1 LSB
• 8-bit resolution
• 32 µs conversion time at fclock = 250 kHz
Applications
• Embedding with remote sensors
• Equipment health monitoring
• Automotive
• Industrial control
Block Diagrams
WM0831
VREF
IN+
IN-
Comparator
DAC
&
SAR
Logic
GND
WM0831
Output
Latch
Vcc
CS
CLK
DO
CS
CLK
DI
CH0
CH1
GND
WM0832
Input Latch
Mux Select Start Conv
Internal CS
VREF
Input
MUX
Comparator
DAC
&
SAR
Logic
WM0832
Output Shift
Register
Vcc
DO
Production Data data sheets contain final
specifications current on publication date. Supply
of products conforms to Wolfson Microelectronics
standard terms and conditions.
Wolfson Microelectronics
Lutton Court, Bernard Terrace, Edinburgh EH8 9NX, UK
Tel: +44 (0) 131 667 9386 Fax: +44 (0) 131 667 5176
email: [email protected]
www: http://www.wolfson.co.uk
© 1996 Wolfson Microelectronics
1 page  
WM0831, WM0832
Electrical Characteristics (3.3V)
Vcc = 3.3V, fCLK = 250KHz, TA = TMIN to TMAX, tr = tf = 20 ns, unless otherwise stated.
PARAMETER
SYMBOL TEST CONDITIONS
MIN
Digital Inputs
High level output voltage
VOH VCC = 3V, IOH = -360 µA
2.4
VCC = 3 V, IOH = -10 µA
2.8
Low level output voltage
VOL VCC = 3V, IOH = 1.6 mA
High level input current
IIH VIH = 3.6 V
Low level input current
IIL VIL = 0 V
High level output (source) IOH VOH = 0 V, TA = 25oC
6.5
current
Low level output (sink) current IOL
VOL = 0V, TA = 25oC
8
High impedance-state
IOZ VO = 3.3V, TA = 25oC
output current (DO)
VO = 0 V, TA = 25oC
Input capacitance
CI
Output capacitance
Co
Converter and Multiplexer
Total unadjusted error
TUE VREF = 3.3 V. (note 7)
Differential Linearity
(note 8)
8
Supply voltage variation error Vs(error) VCC = 3 V to 3.6 V
Common mode error
Differential mode
Common mode input voltage VICR (note 9)
GND-0.05
range
VCC+0.05
Standby input leakage
II(stdby) On-channel VI =3.3V at ON ch.
current (note 10)
Off-channel VI =0 V at OFF ch.
On-channel VI =0 V at ON ch.
Off-channel VI =3.3V at OFF ch.
Conversion time
tconv Excluding MUX addressing time
TYP
0.005
-0.005
15
16
0.01
-0.01
5
5
±1/16
±1/16
MAX
0.4
1
-1
3
-3
±1
±1/4
±1/4
1
-1
-1
1
8
Reference Inputs
Input resistance to
reference ladder
Total device
Supply current WM0831
Supply current WM0832
Timing Parameters
Setup time, CS low or
WM0832 data valid before
clock
Hold time, WM0832 data
valid after clock
Propagation delay time,
output data after clock
Output disable time, DO
after CS
Ri(REF) Can only be tested for WM0831 1.3
ICC
ICC ( note 11)
tsu
350
th 90
MSB data first. CL = 100 pF
tpd LSB data first. CL = 100 pF
tdis CL = 10 pF, RL = 10 kΩ
CL = 100 pF, RL = 2 kΩ
2.4 5.9
0.2 0.75
1.5 2.5
200 500
80 200
80 125
250
UNIT
V
V
V
µA
µA
mA
mA
µA
µA
pF
pF
LSB
Bits
LSB
LSB
V
µA
µA
µA
µA
clock
periods
kΩ
mA
mA
ns
ns
ns
ns
ns
ns
Wolfson Microelectronics
5
5 Page 
Functional Description (continued)
Initiating Conversion and the Digital Interface
WM0831 and WM0832 are controlled from a processor
via a Chip Select (CS) input and a serial interface
comprising Data Out (DO) and additionally for WM0832 a
Data In (DI) input.
For WM0831 conversion is initiated by pulling chip select
low and inputting a clock signal. On the clock's first falling
edge after CS is brought low, DO output comes out of
high impedance mode. On the second and subsequent
clock falling edges, to a total of nine, the conversion
result is output on DO in MSB to LSB order. WM0831 only
provides output data in MSB first order.
For WM0832 conversion is also initiated by pulling the chip
select (CS) line low and inputting a clock signal but MUX
addressing information has also to be input on DI. The
start bit and the MUX assignment bits on DI are clocked
in on the first three rising edges of the clock input which
may be generated by the processor or run continuously.
WM0832 uses two MUX assignment bits.
When the logic “1” start bit is clocked into the start
conversion location of the multiplexer input register the
analogue MUX inputs are selected. After 1/2 a clock
period delay to allow for the selected MUX output to settle
the conversion commences using the successive
approximation technique.
When conversion begins the A/D conversion result from
the output of the SARS comparator appears at the DO
output on each falling edge of the clock (see Functional
Timing Diagrams).
With the successive approximation A/D conversion
routine the analogue input is compared with the output of
a digital to analogue converter (DAC) for each bit by the
SARS comparator and a decision made on whether the
analogue input is higher or lower than the DAC output.
Successive bits, MSB to LSB, are input to the DAC and
remain in its input if the analogue comparison decides
the analogue input is higher than the DAC output, if not
the bit is removed from the DAC input. There is no sample
and hold. The input needs to be stable during Tconv period
(see Functional Timing Diagrams).
The output from the SARS comparator forms the
resulting input to the DAC and the A/D conversion output
on DO, and is read by the processor as conversion takes
place in MSB to LSB order. After 8 clock periods the
conversion is complete.
WM0831, WM0832
For WM0832 the 8 bits of the conversion are stored in an
output shift register, after a conversion has completed and
MSB first data has been output WM0832 automatically
shifts out LSB first data on the DO output.
CS must be held low through an entire conversion, all
internal registers are cleared when CS is high. To initiate
another conversion CS must make a high to low transition
and for WM0832 MUX address assignments input to DI.
For WM0832 the DI input and DO output can be tied
together and controlled via a bidirectional processor I/O
bit line.
Reference Input
The analogue input voltage range, Vmax to Vmin for
differential inputs is defined by the voltage applied to the
reference input with respect to GND. WM0832 is fixed in a
ratiometric mode with VREF internally tied to Vcc, WM0832
has a separate VREF pin and can be used in either
ratiometric applications or those requiring absolute
accuracy.
A ratiometric reference input, typically the Vcc, is the same
supply used to power analogue input circuitry and
sensors. In such systems under a given input condition
the same code will be output with variations in supply
voltage because the same ratio change occurs in both the
analogue and reference input to the A/D. When used in
applications requiring absolute accuracy a suitable time
and temperature stable voltage reference source should
be used.
The voltage source used to drive the reference input should
be capable of driving the 2.4 kΩ typical of the SAR
resistor ladder. The maximum input voltage to the
reference input is the Vcc supply voltage. The minimum
for WM0832 can be at least as low as 1 V to allow for
direct conversion of sensor outputs with output voltage
ranges less than 5 V.
Wolfson Microelectronics
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet WM0831.PDF ] | |
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