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W83194R-39A 반도체 회로 부품 판매점

100MHZ 3-DIMM CLOCK



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W83194R-39A 데이터시트, 핀배열, 회로
W83194R-39/-39A
1.0 GENERAL DESCRIPTION
100MHZ 3-DIMM CLOCK
The W83194R-39/-39A is a Clock Synthesizer which provides all clocks required for high-speed RISC
or CISC microprocessor such as Intel Pentium II. W83194R-39 provides eight different frequency of
CPU and PCI clocks and W83194R-39A provides sixteen CPU/PCI frequencies which are externally
selectable with smooth transitions. W83194R-39/-39A also provides 13 SDRAM clocks controlled by
the none-delay buffer_in pin.
The W83194R-39/-39A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V
supply. Spread spectrum built in at ¡Ó0.5% or ¡Ó0.25% to reduce EMI. Programmable stopping
individual clock outputs and frequency selection through I2C interface. The device meets the
Pentium power-up stabilization, which requires CPU and PCI clocks be stable within 2 ms after
power-up. It is not recommend to use the dual function pin for the slots(ISA, PCI, CPU, DIMM). The
add on cards may have a pull up or pull down.
High drive six PCI and thirteen SDRAM CLOCK outputs typically provide greater than 1 V /ns slew
rate into 30 pF loads. Two CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20
pF loads as maintaining 50¡Ó 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48
MHz provide better than 0.5V /ns slew rate.
2.0 PRODUCT FEATURES
Supports PentiumII CPU with I2C.
2 CPU clocks (one free-running CPU clock)
13 SDRAM clocks for 3 DIMs
6 PCI synchronous clocks
One IOAPIC clock for multiprocessor support
Optional single or mixed supply:
(Vddq1=Vddq2 = Vddq3 = Vddq4 = VddL1 =VddL2= 3.3V) or (Vddq1= Vddq2 = Vddq3=Vddq4 =
3.3V, VddL1 = VdqL2 = 2.5V)
< 250ps skew among CPU and SDRAM clocks
< 250ps skew among PCI clocks
< 5ns propagation delay SDRAM from buffer input
Skew from CPU(earlier) to PCI clock -1 to 4ns, center 2.6ns.
Smooth frequency switch with selections from 50 MHz to 133 MHz CPU
I2C 2-Wire serial interface and I2C read back
Publication Release Date: May 1998
- 1 - Revision 0.20


W83194R-39A 데이터시트, 핀배열, 회로
W83194R-39/-39A
¡Ó0.25% or ¡Ó0.5% spread spectrum function to reduce EMI
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
2ms power up clock stable time
MODE pin for power Management
One 48 MHz for USB & one 24 MHz for super I/O
48-pin SSOP package
PRELIMINARY
3.0 BLOCK DIAGRAM
Xin
Xout
BUFFER IN
FS(0:2)* 3
MODE*
CPU_STOP#
PCI_STOP#
SDATA*
SDCLK*
W83194R-39
PLL2
~
XTAL
OSC
1/2
STOP
6
PLL1
Spread
Spectrum
LATCH
~
POR
4
Control
Logic
Config.
Reg.
STOP
STOP
PCI
Clock STOP
Divider
48MHz
24MHz
IOAPIC
REF(0:1)
2
CPUCLK_F
CPUCLK1
Xin
Xout
BUFFER IN
SDRAM(0:12)
13
FS(0:3)* 4
MODE*
PCICLK(0:4)
5
PCICLK_F CPU_STOP#
PCI_STOP#
SDATA*
SDCLK*
W83194R-39A
PLL2
~
XTAL
OSC
1/2
STOP
6
PLL1
Spread
Spectrum
LATCH
~
POR
4
STOP
STOP
PCI
Clock
Divider
STOP
Control
Logic
Config.
Reg.
48MHz
24MHz
IOAPIC
REF(0:1)
2
CPUCLK_F
CPUCLK1
SDRAM12
SDRAM(0:11)
12
PCICLK(0:4)
5
PCICLK_F
Publication Release Date: May 1998
- 2 - Revision 0.20




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W83194R-39

100MHZ 3-DIMM CLOCK - Winbond



W83194R-39A

100MHZ 3-DIMM CLOCK - Winbond