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Winbond |
W83194AR-W
150MHZ CLOCK FOR WHITNEY CHIPSET
1.0 GENERAL DESCRIPTION
The W83194AR-W is a Clock Synthesizer for Intel Whitney chipset. W83194AR-W provides all
clocks required for high-speed RISC or CISC microprocessor and also provides 64 different
frequencies of CPU, SDRAM, PCI, 3V66, IOAPIC clocks frequency setting. All clocks are externally
selectable with smooth transitions.
The W83194AR-W provides I2C serial bus interface to program the registers to enable or disable
each clock outputs and provides 0.5% and 0.75% center type spread spectrum to reduce EMI.
The W83194AR-W accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30
pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as
maintaining 50¡Ó 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide
better than 0.5V /ns slew rate.
2.0 PRODUCT FEATURES
• 2 CPU clocks
• 9 SDRAM clocks for 2 DIMMs
• 8 PCI synchronous clocks.
• Optional single or mixed supply:
(VddR = VddP=VddS = Vdd48 = Vdd3 = 3.3V, VddA=VddC=2.5V)
• Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns
• Smooth frequency switch with selections from 66.8 to 150MHz
• I2C 2-Wire serial interface and I2C read back
• 0.5% and 0.75% center type spread spectrum
• Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
• Two 48 MHz pins for USB
• 24 MHz for super I/O
• 48-pin SSOP package
Publication Release Date: May. 1999
- 1 - Revision 0.50
3.0 PIN CONFIGURATION
REFX2/*FS3
VddR
Xin
Xout
Vss
Vdd3
3V66-0
3V66-1
Vss3
PCICLK0/ *FS0
PCICLK1/ FS1#
PCICLK2/*FS2
VssP
PCICLK3/FS4#
PCICLK4
VddP
PCICLK5
PCICLK6
PCICLK7
Vss48
48MHz_0
48MHz_1
*SIO_SEL/24_48MHz
Vdd48
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
W83194AR-W
PRELIMINARY
48 VddLAPIC
47 IOAPIC
46 VddLCPU
45 CPUCLK0
44 CPUCLK1
43 VssC
42 VddS
41 SDRAM 0
40 SDRAM 1
39 SDRAM 2
38 VssS
37 SDRAM 3
36 SDRAM 4
35 SDRAM 5
34 VddS
33 SDRAM 6
32 SDRAM 7
31 SDRAM 8
30 VssS
29 PD#
28 *SDCLK
27 VddA
26 VssA
25 *SDATA
Publication Release Date: May. 1999
- 2 - Revision 0.50
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