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PDF RV4141 Data sheet ( Hoja de datos )

Número de pieza RV4141
Descripción Low Power Ground Fault Interrupter
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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RV4141A
Low Power Ground Fault Interrupter
www.fairchildsemi.com
Features
• Powered from the AC line
• Built-in rectifier
• Direct interface to SCR
• 500 µA quiescent current
• Precision sense amplifier
• Adjustable time delay
• Minimum external components
• Meets UL 943 requirements
• For use with 110V or 220V systems
• Available in 8 pin DIP or SOIC package
Block Diagram
Amp Out
RV4141A
VFB
VREF
Gnd
+
Description
The RV4141A is a low power controller for AC receptacle
ground fault circuit interrupters. These devices detect
hazardous current paths to ground and ground to neutral
faults. The circuit interrupter then disconnects the load from
the line before a harmful or lethal shock occurs.
Internally, the RV4141A contains a diode rectifier, shunt
regulator, precision sense amplifier, current reference, time
delay circuit, and SCR driver.
Two sense transformers, SCR, solenoid, three resistors and
four capacitors complete the design of the basic circuit inter-
rupter. The simple layout and minimum component count
insure ease of application and long term reliability.
Features not found in other GFCI controllers include a low
offset voltage sense amplifier eliminating the need for a
coupling capacitor between the sense transformer and sense
amplifier, and an internal rectifier to eliminate high voltage
rectifying diodes.
The RV4141A is powered only during the positive half
period of the line voltage, but can sense current faults inde-
pendent of its phase relative to the line voltage. The gate of
the SCR is driven only during the positive half cycle of the
line voltage.
Cap
+
+
SCR
+
Delay
4.7K
+VS
Line
65-4141-01
REV. 1.0.1 7/8/03

1 page




RV4141 pdf
RV4141A
PRODUCT SPECIFICATION
RSET is 1 M, RSEC is 45and the VOS of the sense ampli-
fier is its maximum of 200 µV, the trip current error is
±5.6%.
The SCR anode is directly connected to a solenoid or relay
coil. It can be tripped only when its anode is more positive
than its cathode. It must have a high dV/dt rating to ensure
that line noise (generated by electrically noisy appliances)
does not falsely trigger it. Also the SCR must have a gate
drive requirement less than 200 µA. C3 is a noise filter that
prevents high frequency line pulses from triggering the SCR.
The relay solenoid used should have a response time of 3 ms
or less to meet the UL 943 timing requirement.
Sense Transformers and Cores
The sense and ground/neutral transformer cores are usually
fabricated using high permeability laminated steel rings.
Their single turn primary is created by passing the line and
neutral wires through the center of its core. The secondary is
usually from 200 to 1500 turns.
Magnetic Metals Corporation
1900 Hayes Ave.
Camden, NJ 08105
(856) 964-7842
Is a full-line suppliers of ring cores and transformers
designed specifically for GFCI and related applications.
Calculating The Values Of RSET and C2
Determine the nominal ground fault trip current requirement.
This will be typically 5 mA in North America (117V AC)
and 22 mA in the UK and Europe (220V AC). Determine the
minimum delay time required to prevent nuisance tripping.
This will typically be 1 to 2 ms. The value of C2 required to
provide the desired delay time is:
C2 = 6 x T
where:
C2 is in nF
T is the desired delay time in ms.
The value of RSET to meet the nominal ground fault trip cur-
rent specification is:
RSET = -I--F---A----U---L----T----×--4---C.--6--O--×--S---N--1---8---0----(--T--------P----)
where:
RSET is in k
T is the time delay in ms
P is the period of the line frequency in ms
IFAULT is the desired ground fault trip current in mA RMS
N is the number of sense transformer secondary turns.
This formula assumes an ideal sense transformer is used.
The calculated value of RSET may have to be changed up to
30% to when using a non-ideal transformer.
RTEST
Press to
Mov Sense Transformer
1:1000
5 Ring Steel Core
15K Test
Grounded Neutral
1:200
Phase
Line
Neutral
Normally Closed
Latching Contacts
Load
GFCI
C4
R IN
470 C1
10 nF
R SET
1.1 Meg
1
2
3
4
1000 pF
RV4141A
C2
8
12 nF
7
6
C
+
F
1µF 35V
5
Solenoid
RN RB
0.4 20K
Q1
TAG
X0103DA
C3
10 nF
1N4004
R LINE
24K
1W
RG
1.6
Fault
Resistance
Not Part of
Application
Note:
1. Portions of this schematic are subject to U.S. patents 3,878,435 and Re. 30,678.
Figure 1. GFI Application Circuit
65-4141A-03
REV. 1.0.1 7/8/03
5

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