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TP0606 반도체 회로 부품 판매점

P-Channel Enhancement-Mode Vertical DMOS FETs



Supertex  Inc 로고
Supertex Inc
TP0606 데이터시트, 핀배열, 회로
TP0606
Low Threshold
P-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BVDSS /
BVDGS
-60V
RDS(ON)
(max)
3.5
ID(ON)
(min)
-1.5A
VGS(th)
(max)
-2.4V
Order Number / Package
TO-92
TP0606N3
Features
Low threshold — -2.4V max
High input impedance
Low input capacitance — 80pF typical
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Applications
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Options
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
BVDSS
BVDGS
± 20V
-55°C to +150°C
300°C
SGD
TO-92
Note 1: See Package Outline section for dimensions.
Note 2: See Array section for quad pinouts.
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex prod1ucts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.


TP0606 데이터시트, 핀배열, 회로
Thermal Characteristics
Package
ID (continuous)*
ID (pulsed)
TO-92
0.32A
* ID (continuous) is limited by max rated Tj.
-3.5A
Power Dissipation
@ TC = 25°C
1W
θjc
°C/W
125
θja
°C/W
170
TP0606
IDR*
0.32A
IDRM
-3.5A
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol
BVDSS
Parameter
Drain-to-Source Breakdown Voltage
Min Typ Max
-60
Unit
V
Conditions
VGS = 0V, ID = -2.0mA
VGS(th)
VGS(th)
IGSS
IDSS
Gate Threshold Voltage
Change in VGS(th) with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
-1.0
-2.4
-5.0
-100
-10
-1.0
V
mV/°C
nA
µA
mA
ID(ON)
ON-State Drain Current
-0.4 -0.6
-1.5 -2.5
RDS(ON)
Static Drain-to-Source
ON-State Resistance
5.0 7.0
3.0 3.5
RDS(ON) Change in RDS(ON) with Temperature
1.7
GFS Forward Transconductance
300 400
CISS Input Capacitance
80 150
COSS
Common Source Output Capacitance
50 85
CRSS
Reverse Transfer Capacitance
15 35
td(ON)
Turn-ON Delay Time
10
tr Rise Time
15
td(OFF)
Turn-OFF Delay Time
20
tf Fall Time
15
VSD Diode Forward Voltage Drop
-1.8
trr Reverse Recovery Time
300
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
A
%/°C
m
pF
ns
V
ns
VGS = VDS, ID = -1.0mA
VGS = VDS, ID = -1.0mA
VGS = ±20V, VDS = 0V
VGS = 0V, VDS = Max Rating
VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
VGS = -5V, VDS = -25V
VGS = -10V, VDS = -25V
VGS = -5V, ID = -250mA
VGS = -10V, ID = -0.75A
VGS = -10V, ID = -0.75A
VDS = -25V, ID = -0.75A
VGS = 0V, VDS = -25V
f = 1 MHz
VDD = -25V
ID = -1.0A
RGEN = 25
VGS = 0V, ISD = -1.0A
VGS = 0V, ISD = -1.0A
Switching Waveforms and Test Circuit
0V
INPUT
-10V
10%
t(ON)
90%
t(OFF)
td(ON)
tr
td(OFF)
tF
0V
OUTPUT
VDD
90%
10%
90%
10%
PULSE
GENERATOR
Rgen
INPUT
2
D.U.T.
OUTPUT
RL
VDD




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