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X76F041P-3 반도체 회로 부품 판매점

PASS TM SecureFlash



Xicor 로고
Xicor
X76F041P-3 데이터시트, 핀배열, 회로
APPLICATION NOTE
A V A I LABLE
AN83 • Development Tools XK76C
Password Access Security Supervisor
4K
X76F041
4 x 128 x 8 Bit
PASSTM SecureFlash
FEATURES
• 64-Bit Password Security
• Three Password Modes
—Secure Read Access
—Secure Write Access
—Secure Configuration Access
• Programmable Configuration
—Read, Write and Configuration Access
Passwords
—Multiple Array Access/Functionality
—Retry Register/Counter
• 8 Byte Sector Write
• (4) 1K Memory Arrays
• ISO Response to Reset
• Low Power CMOS
—50µA Standby Current
—3mA Active Current
• 1.8V to 3.6V or 5V “Univolt” Read and Program
Power Supply Versions
• High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
—ESD Protection: 2000V on All Pins
DESCRIPTION
The X76F041 is a password access security supervisor
device, containing four 128 x 8 bit SecureFlash arrays.
Access can be controlled by three 64-bit programmable
passwords, one for read operations, one for write opera-
tions and one for device configuration.
The X76F041 features a serial interface and software
protocol allowing operation on a simple two wire bus. The
bus signals are a clock input (SCL) and a bidirectional
data input and output (SDA). Access to the device is con-
trolled through a chip select input (CS), allowing any
number of devices to share the same bus.
The X76F041 also features a synchronous response to
reset; providing an automatic output of a pre-configured
32-bit data stream conforming to the ISO standard for
memory cards.
The X76F041 utilizes Xicor’s proprietary Direct WriteTM
cell, providing a minimum endurance of 100,000 cycles
per sector and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM
CS
SCL
SDA
RETRY
COUNTER
INTERFACE
LOGIC
RST
©Xicor, Inc. 1994, 1995, 1996 Patents Pending
7002-2.2 4/30/97 T3/C0/D0 SH
CHIP
ENABLE
DATA
TRANSFER
ARRAY ACCESS
ENABLE
PASSWORD ARRAY AND
PASSWORD VERIFICATION
LOGIC
ISO RESET RESPONSE
DATA REGISTER
CONFIGURATION
REGISTER
1
000–07F
080–0FF
100–17F
180–1FF
(4) 16 x 64
SECUREFLASH
ARRAYS
7002 ILL F01
Characteristics subject to change without notice


X76F041P-3 데이터시트, 핀배열, 회로
X76F041
PIN DESCRIPTION
Serial Data Input/Output (SDA)
SDA is a true three state serial data input/output pin.
During a read cycle, data is shifted out on this pin.
During a write cycle, data is shifted in on this pin. In all
other cases this pin is in a high impedance state.
Serial Clock (SCL)
The Serial Clock controls the serial bus timing for data
input and output.
Chip Select (CS)
When CS is HIGH, the X76F041 is deselected and the
SDA pin is at high impedance and unless an internal
write operation is underway the X76F041 will be in the
standby power mode. CS LOW enables the X76F041,
placing it in the active power mode.
Reset (RST)
RST is a device reset pin. When RST is pulsed HIGH
while CS is LOW the X76F041 will output 32 bits of
fixed data which conforms to the ISO standard for
“synchronous response to reset”. CS must remain
LOW and the part must not be in a write cycle for the
response to reset to occur. If at any time during the
response to reset CS goes HIGH, the response to
reset will be aborted and the part will return to the
standby mode.
PIN CONFIGURATION
DIP/SOIC
VCC
RST
SCL
NC
18
27
X76F041
36
45
VSS
CS
SDA
NC
Symbol
CS
SDA
RST
SCL
VSS
VCC
NC
7002 ILL F02
Description
Chip Select Input
Serial Data Input/Output
Reset Input
Serial Clock Input
Ground
Supply Voltage
No Connect
7002 FRM T01
2




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