파트넘버.co.kr X68C64PI 데이터시트 PDF


X68C64PI 반도체 회로 부품 판매점

E2 Micro-Peripheral



Xicor 로고
Xicor
X68C64PI 데이터시트, 핀배열, 회로
X686X8CX6M4icrocontroller Family Compatible
64K
X68C64
8192 x 8 Bit
E2 Micro-Peripheral
FEATURES
CONCURRENT READ WRITE
—Dual Plane Architecture
—Isolates Read/Write Functions
Between Planes
—Allows Continuous Execution of Code
From One Plane While Writing in
the Other Plane
Multiplexed Address/Data Bus
—Direct Interface to Popular 8-bit
Microcontrollers, e.g., Motorola M6801/03,
M68HC11 Family
High Performance CMOS
—Fast Access Time, 120ns
—Low Power
—60mA Maximum Active
—500µA Maximum Standby
Software Data Protection
Block Protect Register
—Individually Set Write Lock Out in 1K Blocks
Toggle Bit Polling
—Early End of Write Detection
Page Mode Write
—Allows up to 32 Bytes to be Written in
One Write Cycle
High Reliability
—Endurance: 100,000 Write Cycles
—Data Retention: 100 Years
DESCRIPTION
The X68C64 is an 8K x 8 E2PROM fabricated with
advanced CMOS Textured Poly Floating Gate Technol-
ogy. The X68C64 features a Multiplexed Address and
Data bus allowing a direct interface to a variety of
popular single-chip microcontrollers operating in ex-
panded multiplexed mode without the need for addi-
tional interface circuitry.
The X68C64 is internally configured as two independent
4K x 8 memory arrays. This feature provides the ability
to perform nonvolatile memory updates in one array and
continue operation out of code stored in the other array;
effectively eliminating the need for an auxiliary memory
device for code storage.
To write to the X68C64, a three-byte command
sequence must precede the byte(s) being written. The
X68C64 also provides a second generation software
data protection scheme called Block Protect. Block
Protect can provide write lockout of the entire device or
selected 1K blocks. There are eight 1K x 8 blocks that
can be write protected individually in any combination
required by the user. Block Protect, in addition to Write
Control input, allows the different segments of the memory
to have varying degrees of alterability in normal system
operation.
FUNCTIONAL DIAGRAM
CE
R/W
E
SEL
A8–A11
AS
CONTROL
LOGIC
LX
AD
TE
CC
HO
ED
SE
WC
A12
SOFTWARE
DATA
PROTECT
A12
1K BYTES A12 1K BYTES
M
1K BYTES
1K BYTES
U
1K BYTES X 1K BYTES
1K BYTES
1K BYTES
Y DECODE
CONCURRENT READ WRITEis a trademark of Xicor, Inc.
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3868-2.6 9/16/96 T0/C0/D2 SH
I/O & ADDRESS LATCHES AND BUFFERS
A/D0–A/D7
3868 FHD F02
1 Characteristics subject to change without notice


X68C64PI 데이터시트, 핀배열, 회로
X68C64
PIN DESCRIPTIONS
Address/Data (A/D0–A/D7)
Multiplexed low-order addresses and data. The ad-
dresses flow into the device while AS is HIGH. After AS
transitions from a HIGH to LOW the addresses are
latched. Once the addresses are latched these pins
input data or output data depending on E, R/W, and CE.
Addresses (A8–A12)
High order addresses flow into the device when AS is
HIGH and are latched when AS goes LOW.
Chip Enable (CE)
The Chip Enable input must be HIGH to enable all read/
write operations. When CE is LOW and AS is LOW, the
X68C64 is placed in the low power standby mode.
Enable (E)
When used with a MC6801 or MC6803, the E input is tied
directly to the E output of the microcontroller.
Read/Write (R/W)
When used with a MC6801 or MC6803, the R/W input is
tied directly to the R/W output of the microcontroller.
Address Strobe (AS)
Addresses flow through the latches to address decoders
when AS is HIGH and are latched when AS transitions
from a HIGH to LOW.
Device Select (SEL)
Must be connected to VSS.
Write Control (WC)
The Write Control allows external circuitry to abort a
page load cycle once it has been initiated. This input is
useful in applications in which a power failure or proces-
sor RESET could interrupt a page load cycle. In this
case, the microcontroller might drive all signals HIGH,
causing bad data to be latched into the E2PROM. If the
Write Control input is driven HIGH (before tTBLC Max)
after Read/Write (R/W) goes HIGH, the write cycle will
be aborted.
When WC is LOW (tied to VSS) the X68C64 will be
enabled to perform write operations. When WC is HIGH
normal read operations may be performed, but all at-
tempts to write to the device will be disabled.
PIN CONFIGURATION
DIP/SOIC
NC
A12
NC
NC
WC
SEL
A/D0
A/D1
A/D2
A/D3
A/D4
VSS
1 24
2 23
3 22
4 21
5 20
6 19
X68C64
7 18
8 17
9 16
10 15
11 14
12 13
VCC
R/W
AS
A8
A9
A11
E
A10
CE
A/D7
A/D6
A/D5
3868 FHD F01.1
PIN NAMES
Symbol
AS
A/D0–A/D7
A8–A12
E
R/W
CE
WC
SEL
VSS
VCC
NC
Description
Address Strobe
Address Inputs/Data I/O
Address Inputs
Enable Input
Read/Write Input
Chip Enable
Write Control
Device Select—Connect to VSS
Ground
Supply Voltage
No Connect
3868 PGM T01.1
2




PDF 파일 내의 페이지 : 총 12 페이지

제조업체: Xicor

( xicor )

X68C64PI data

데이터시트 다운로드
:

[ X68C64PI.PDF ]

[ X68C64PI 다른 제조사 검색 ]




국내 전력반도체 판매점


상호 : 아이지 인터내셔날

전화번호 : 051-319-2877

[ 홈페이지 ]

IGBT, TR 모듈, SCR, 다이오드모듈, 각종 전력 휴즈

( IYXS, Powerex, Toshiba, Fuji, Bussmann, Eaton )

전력반도체 문의 : 010-3582-2743



일반적인 전자부품 판매점


디바이스마트

IC114

엘레파츠

ICbanQ

Mouser Electronics

DigiKey Electronics

Element14


관련 데이터시트


X68C64P

E2 Micro-Peripheral - Xicor



X68C64PI

E2 Micro-Peripheral - Xicor



X68C64PM

E2 Micro-Peripheral - Xicor