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X9221WS 반도체 회로 부품 판매점

Dual E2POT Nonvolatile Digital Potentiometer



Xicor 로고
Xicor
X9221WS 데이터시트, 핀배열, 회로
APPLICATION NOTES
AVA I L A B L E
AN20 • AN42 • AN44–48 • AN50 • AN52 • AN53 • AN73
XATed9vr2ma2n1icneaIlnVfoormltaatgioen±5V, 64 Taps
X9221
Dual E2POTNonvolatile Digital Potentiometer
FEATURES
Two E2POTs in One Package
Two-Wire Serial Interface
Register Oriented Format
—Directly Write Wiper Position
—Read Wiper Position
—Store as Many as Four Positions per Pot
Instruction Format
—Quick Transfer of Register Contents to
Resistor Array
Low Power CMOS
Direct Write Cell
—Endurance - 100,000 Writes per Register
—Register Data Retention - 100 years
8 Bytes of E2PROM memory
3 Resistor Array Values
—2Kto 50KMask Programmable
Resolution: 64 Taps each Pot
20-Lead Plastic DIP and 20-Lead SOIC Packages
DESCRIPTION
The X9221 integrates two nonvolatile E2POT™ digitally
controlled potentiometers on a monolithic CMOS micro-
circuit.
The X9221 contains two resistor arrays, each com-
posed of 63 resistive elements. Between each element
and at either end are tap points accessible to the wiper
elements. The position of the wiper element on the array
is controlled by the user through the two-wire serial bus
interface.
Each resistor array has associated with it a wiper counter
register and four 8-bit data registers that can be directly
written and read by the user. The contents of the wiper
counter register control the position of the wiper on the
resistor array.
The data register may be read or written by the user. The
contents of the data registers can be transferred to the
wiper counter register to position the wiper. The current
wiper position can be transferred to any one of its
associated data registers.
FUNCTIONAL DIAGRAM
SCL
SDA
A0
A1
A2
A3
INTERFACE
AND
CONTROL
CIRCUITRY
8
DATA
R0 R1
WIPER
COUNTER
REGISTER
R2 R3 (WCR)
VH0
VL0
VW0
R0 R1 WIPER
COUNTER RESISTOR
REGISTER ARRAY
R2 R3 (WCR)
POT 1
VH1
VL1
VW1
3079 ILL F07.1
© Xicor, Inc. 1994, 1995, 1996 Patents Pending.
3079-1.6 6/12/96 T1/C1/D0 NS
1
Characteristics subject to change without notice


X9221WS 데이터시트, 핀배열, 회로
X9221
PIN DESCRIPTIONS
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9221.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It is an open drain output and may be
wire-ORed with any number of open drain or open
collector outputs. An open drain output requires the use
of a pull-up resistor. For selecting typical values, refer
to the guidelines for calculating typical values on the
bus pull-up resistors graph.
Address
The Address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
Address input in order to initiate communication with the
X9221
Potentiometer Pins
VH (VH0 – VH1), VL (VL0 – VL1)
The VH and VL inputs are equivalent to the terminal
connections on either end of a mechanical potentiom-
eter.
VW (VW0 – VW1)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
PIN CONFIGURATION
DIP/SOIC
VW0
VL0
VH0
A0
A2
VW1
VL1
VH1
SDA
VSS
1 20
2 19
3 18
4 17
5 16
X9221
6 15
7 14
8 13
9 12
10 11
VCC
RES
RES
RES
A1
A3
SCL
RES
RES
RES
3079 ILL F01.1
PIN NAMES
Symbol
SCL
SDA
A0–A3
VH0–VH1, VL0–VL1
VW0–VW1
RES
Description
Serial Clock
Serial Data
Address
Potentiometers
(terminal equivalent)
Potentiometers
(wiper equivalent)
Reserved (Do not connect)
3079 PGM T01
PRINCIPLES OF OPERATION
The X9221 is a highly integrated microcircuit incorporat-
ing two resistor arrays, their associated registers and
counters and the serial interface logic providing direct
communication between the host and the E2POT poten-
tiometers.
Serial Interface
The X9221 supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave. The
master will always initiate data transfers and provide the
clock for both transmit and receive operations. There-
fore, the X9221 will be considered a slave device in all
applications.
Clock and Data Conventions
Data states on the SDA line can change only during SCL
LOW periods (tLOW). SDA state changes during SCL HIGH
are reserved for indicating start and stop conditions.
Start Condition
All commands to the X9221 are preceded by the start
condition, which is a HIGH to LOW transition of SDA
while SCL is HIGH (tHIGH). The X9221 continuously
monitors the SDA and SCL lines for the start condition
and will not respond to any command until this condition
is met.
Stop Condition
All communications must be terminated by a stop con-
dition, which is a LOW to HIGH transition of SDA while
SCL is HIGH.
2




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