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X84641V20I-2.5 반도체 회로 부품 판매점

uPort Saver EEPROM



Xicor 로고
Xicor
X84641V20I-2.5 데이터시트, 핀배열, 회로
APPLICATION NOTE
A V A I LABLE
AN95 • AN103 • AN107
16K/64K/128K
X84161/641/129
µPort Saver EEPROM
MPSEEPROM
FEATURES
• Up to 10MHz data transfer rate
• 25ns Read Access Time
• Direct Interface to Microprocessors and
Microcontrollers
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
• Low Power CMOS
—1.8V–3.6V, 2.5V–5.5V and 5V ±10% Versions
—Standby Current Less than 1µA
—Active Current Less than 1mA
• Byte or Page Write Capable
—32-Byte Page Write Mode
• Typical Nonvolatile Write Cycle Time: 2ms
• High Reliability
—100,000 Endurance Cycles
—Guaranteed Data Retention: 100 Years
DESCRIPTION
The µPort Saver memories need no serial ports or spe-
cial hardware and connect to the processor memory bus.
Replacing bytewide data memory, the µPort Saver uses
bytewide memory control functions, takes a fraction of
the board space and consumes much less power.
Replacing serial memories, the µPort Saver provides all
the serial benefits, such as low cost, low power, low volt-
age, and small package size while releasing I/Os for
more important uses.
The µPort Saver memory outputs data within 25ns of an
active read signal. This is less than the read access time
of most hosts and provides “no-wait-state” operation.
This prevents bottlenecks on the bus. With rates to 10
MHz, the µPort Saver supplies data faster than required
by most host read cycle specifications. This eliminates
the need for software NOPs.
The µPort Saver memories communicate over one line of
the data bus using a sequence of standard bus read and
write operations. This “bit serial” interface allows the
µPort Saver to work well in 8-bit, 16 bit, 32-bit, and 64-bit
systems.
A Write Protect (WP) pin prevents inadvertent writes to
the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data reten-
tion is greater than 100 years.
BLOCK DIAGRAM
System Connection
Ports
Saved
µP
µC
DSP
ASIC
RISC
P0/CS
P1/CLK
P2/DI
P3/DO
A15
A0
D7
D0
OE
WE
©Xicor, Inc. 1994, 1997Patents Pending
7008-1.2 8/26/97 T2/C0/D0 SH
Internal Block Diagram
MPS
WP H.V. GENERATION
TIMING & CONTROL
CE
COMMAND
I/O DECODE
OE
AND
CONTROL
LOGIC
WE
X
DEC
EEPROM
ARRAY
16K x 8
8K x 8
2K x 8
Y DECODE
DATA REGISTER
7008 FRM F02.1
1 Characteristics subject to change without notice


X84641V20I-2.5 데이터시트, 핀배열, 회로
X84161/641/129
PIN CONFIGURATIONS: Drawings are to the same scale, actual package sizes are shown in inches:
CE
I/O
WP
VSS
8-LEAD PDIP
8-LEAD SOIC
18
2 X84161 7
3 X84641 6
45
.230 in.
CE
I/O
NC
NC
NC
WP
VSS
14-LEAD SOIC
1 14
2 13
3 12
4 11
X84129
5 10
69
78
.230 in.
VCC
NC
OE .190 in.
WE
NC
VCC
CE
I/O
8-LEAD TSSOP
1
2
3
X84161
4
.252 in.
8
7
6
5
V CC
NC
NC
NC
NC .390 in.
OE
WE
NC
NC
CE
I/O
NC
NC
NC
WP
VSS
NC
NC
NC
CE
CE
CE
I/O
NC
NC
NC
WP
VSS
NC
NC
NC
20-LEAD TSSOP
1
2
3
4
5 X84641
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
.252 in.
28-LEAD TSSOP
1
2
3
4
5
6
7
8 X84129
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
. 252 in.
OE
WE
WP
VSS
.114 in.
NC
NC
VCC
NC
NC
NC
NC
OE
WE
NC
.250 in.
NC
NC
NC
NC
VCC
NC
NC
NC
.394 in.
NC
OE
WE
NC
NC
NC
PIN NAMES
I/O Data Input/Output
CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input
WP Write Protect Input
VCC Supply Voltage
VSS Ground
NC No Connect
7008 FRM T01
PACKAGE
SELECTION GUIDE
84161
84641
84129
8-Lead PDIP
8-Lead SOIC
8-Lead TSSOP
8-Lead PDIP
8-Lead SOIC
20-Lead TSSOP
8-Lead PDIP
14-Lead SOIC
28-Lead TSSOP
7008 FRM T0A
7008 FRM F01
PIN DESCRIPTIONS
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, the chip is dese-
lected, the I/O pin is in the high impedance state, and
unless a nonvolatile write operation is underway, the
device is in the standby power mode.
Output Enable (OE)
The Output Enable input must be LOW to enable the out-
put buffer and to read data from the device on the I/O line.
Write Enable (WE)
The Write Enable input must be LOW to write either data
or command sequences to the device.
Data In/Data Out (I/O)
Data and command sequences are serially written to or
serially read from the device through the I/O pin.
Write Protect (WP)
When the Write Protect input is LOW, nonvolatile writes
to the device are disabled. When WP is HIGH, all func-
tions, including nonvolatile writes, operate normally. If a
nonvolatile write cycle is in progress, WP going LOW will
have no effect on the cycle already underway, but will
inhibit any additional nonvolatile write cycles.
2




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uPort Saver EEPROM - Xicor