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PDF XR-T5683A Data sheet ( Hoja de datos )
| Número de pieza | XR-T5683A | |
| Descripción | PCM Line Interface Chip | |
| Fabricantes | Exar Corporation | |
| Logotipo |  |
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...the analog plus companyTM
XR-T5683A
PCM Line
Interface Chip
FEATURES
D Single 5V Supply
D Receiver Input Can Be Either Balanced or
Unbalanced
D Up To 8.448Mbps Operation In Both Tx and Rx
Directions
D TTL Compatible Interface
June 1997-3
D Device Can Be Used as a Line Interface Unit With-
out Clock Recovery
APPLICATIONS
D T1, T2, E1 & E2 Rates, PCM Line Interface
D Network Multiplexing and Terminating Equipment
GENERAL DESCRIPTION
The XR-T5683A is a PCM line interface chip consisting of
both transmit and receive circuitry. This device is offered
in a plastic dual in-line (PDIP) or in a surface mount
package (SOIC). The maximum bit rate of the chip is
8.448Mbps, and the signal level to the receiver can be
attenuated by -10dB cable loss at one-half the bit rate. At
nominal supply voltage operation, the typical current
consumption is 40mA.
ORDERING INFORMATION
Part No.
XR-T5683AIP
XR-T5683AID
Package
18 Lead 300 Mil PDIP
18 Lead 300 Mil JEDEC SOIC
Operating
Temperature Range
-40°C to +85°C
-40°C to +85°C
BLOCK DIAGRAM
RXDATA+ 2
RXDATA- 3
RVCC 9
RGND 7
TVCC 18
TPOS 17
TCLK 16
TNEG 12
TGND 14
Peak
Detector
BIAS
BIAS
1 PDC
Positive
Threshold
Comparator
Negative
Threshold
Comparator
Open Collector
Driver
Open Collector
Driver
Figure 1. Block Diagram
TTL Buffer
11 RPOS
TTL Buffer
TTL Buffer
8 RCLK
4 TE
10 RNEG
6 TANK BIAS
5 BIAS
13 TXDATA+
15 TXDATA-
Rev. 2.01
E1995
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017
1
1 page  
XR-T5683A
Table 1 shows typical expected jitter tolerance. The
following measurements have been done at a
transmission rate of T1 (1.544MHz). (See Figure 2).
Jitter
10Hz
100Hz
500Hz
1kHz
2kHz
3kHz
4kHz
1.544Mbs in UI
>10UI
>10UI
>10UI
6.5UI
3.3UI
2.1UI
1.5UI
Jitter
5kHz
8kHz
10kHz
32kHz
50kHz
77kHz
-
1.544Mbs in UI
1.3UI
0.8UI
0.7UI
0.5UI
0.45UI
0.45UI
-
VCC = +5V "5%, TA = 25°C
Table 1. Jitter Tolerance at 1.544Mbps with 6db Cable Loss
Jitter
Generator
HP3785B
(transmitter
side)
Clock
6db Cable Attenuation
Pattern
Generator
HP3781B
RXDATA+
XR-T5683A
RXDATA-
RX
RPOS
RCLK
RNEG
Clock
Phase
Shift
Circuit
TPOS
XR-T5683A
TCLK
TNEG
TX
TXDATA+
TXDATA-
Figure 2. Jitter Measurement Set-up
Jitter
Analyzer
HP3785B
(Receive Side)
Rev. 2.01
5
5 Page 
XR-T5683A
18 LEAD SMALL OUTLINE
(300 MIL JEDEC SOIC)
Rev. 1.00
D
18
1
Seating
Plane
e
10
EH
9
B A1
C
A
α
L
Rev. 2.01
INCHES
MILLIMETERS
SYMBOL
MIN MAX
MIN MAX
A
0.093 0.104
2.35 2.65
A1
0.004 0.012
0.10 0.30
B
0.013 0.020
0.33 0.51
C
0.009 0.013
0.23 0.32
D
0.447 0.463
11.35 11.75
E
0.291 0.299
7.40 7.60
e
0.050 BSC
1.27 BSC
H
0.394 0.419
10.00 10.65
L
0.016 0.050
0.40 1.27
α
0° 8°
0° 8°
Note: The control dimension is the millimeter column
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet XR-T5683A.PDF ] | |
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