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Samsung semiconductor |
K9F1608W0A-TCB0, K9F1608W0A-TIB0
Document Title
2M x 8 Bit NAND Flash Memory
Revision History
Revision No. History
0.0 Initial issue.
1.0 Data Sheet 1998.
1.1 Data Sheet 1999.
1) Added CE dont’ care mode during the data-loading and reading
1.2 1) Revised real-time map-out algorithm(refer to technical notes)
1.3 Changed device name
- KM29W16000AT -> K9F1608W0A-TCB0
- KM29W16000AIT -> K9F1608W0A-TIB0
FLASH MEMORY
Draft Date
April 10th 1998
July 14th 1998
April 10th 1999
Remark
Preliminary
Final
Final
July 23th 1999
Sep.15th 1999
Final
Final
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
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K9F1608W0A-TCB0, K9F1608W0A-TIB0
2M x 8 Bit NAND Flash Memory
FLASH MEMORY
FEATURES
• Voltage Supply : 2.7V ~ 5.5V
• Organization
- Memory Cell Array : (2M + 64K)bit x 8bit
- Data Register : (256 + 8)bit x8bit
• Automatic Program and Erase
- Page Program : (256 + 8)Byte
- Block Erase : (4K + 128)Byte
- Status Register
• 264-Byte Page Read Operation
- Random Access : 10µs(Max.)
- Serial Page Access : 80ns(Min.)
• Fast Write Cycle Time
- Program time : 250µs(typ.)
- Block Erase time : 2ms (typ.)
• Command/Address/Data Multiplexed I/O port
• Hardware Data Protection
- Program/Erase Lockout During Power Transitions
• Reliable CMOS Floating-Gate Technology
- Endurance : 1M Program/Erase Cycles
- Data Retention : 10 years
• Command Register Operation
• 44(40) - Lead TSOP Type II (400mil / 0.8 mm pitch)
- Forward Type
GENERAL DESCRIPTION
The K9F1608W0A is a 2M(2,097,152)x8bit NAND Flash Mem-
ory with a spare 64K(65,536)x8bit. Its NAND cell provides the
most cost-effective solution for the solid state mass storage
market. A program operation programs the 264-byte page in
typically 250µs and an erase operation can be performed in typ-
ically 2ms on a 4K-byte block.
Data in the page can be read out at 80ns cycle time per byte.
The I/O pins serve as the ports for address and data input/out-
put as well as command inputs. The on-chip write controller
automates all program and erase system functions, including
pulse repetition, where required, and internal verify and margin-
ing of data. Even the write-intensive systems can take advan-
tage of the K9F1608W0A extended reliability of 1,000,000
program/erase cycles by providing either ECC(Error Correction
Code) or real time mapping-out algorithm. These algorithms
have been implemented in many mass storage applications and
also the spare 8bytes of a page combined with the other 256
bytes can be utilized by system-level ECC.
The K9F1608W0A is an optimum solution for large nonvolatile
storage application such as solid state storage, digital voice
recorder, digital still camera and other portable applications
requiring nonvolatility.
PIN CONFIGURATION
VSS
CLE
ALE
WE
WP
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
I/O0
I/O1
I/O2
I/O3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 VCC
43 CE
42 RE
41 R/B
40 GND
39 N.C
38 N.C
37 N.C
36 N.C
35 N.C
34
33
32 N.C
31 N.C
30 N.C
29 N.C
28 N.C
27 I/O7
26 I/O6
25 I/O5
24 I/O4
23 VCCQ
44(40) TSOP (II)
STANDARD TYPE
PIN DESCRIPTION
Pin Name
I/O0 ~ I/O7
CLE
ALE
CE
RE
WE
WP
GND
R/B
VCC
VCCQ
VSS
N.C
Pin Function
Data Inputs/Outputs
Command Latch Enable
Address Latch Enable
Chip Enable
Read Enable
Write Enable
Write Protect
Ground Input
Ready/Busy output
Power(2.7V~5.5V)
Output Butter Power(2.7V~5.5V)
Ground
No Connection
NOTE : Connect all VCC,VccQ and VSS pins of each device to power supply outputs.
Do not leave VCC or VSS disconnected.
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