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Número de pieza | 74AC273 | |
Descripción | OCTAL D-TYPE FLIP FLOP WITH CLEAR | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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OCTAL D-TYPE FLIP FLOP WITH CLEAR
PRELIMINARY DATA
s HIGH SPEED:
fMAX = 190 MHz (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 oC
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
s IMPROVED LATCH-UP IMMUNITY
BM
(Plastic Package)
(Micro Package)
ORDER CODES :
74AC273B
74AC273M
operation similar to equivalent Bipolar Schottky
TTL.
Information signals applied to D inputs are
transfered to the Q output on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independentely of the other inputs .
DESCRIPTION
All inputs and outputs are equipped with
The AC273 is a high-speed CMOS OCTwwAwL.DataSheet4pU.rcoomtection circuits against static discharge, giving
D-TYPE FLIP FLOP WITH CLEAR fabricated them 2KV ESD immunity and transient excess
with sub-micron silicon gate and double-layer voltage.
metal wiring C2MOS technology. It is ideal for low
power applications mantaining high speed
PIN CONNECTION AND IEC LOGIC SYMBOLS
November 1998
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1 page 74AC273
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns)
Symb ol
Parameter
tPLH Propagation Delay Time
tPHL CLOCK to Q
tPHL Propagation Delay Time
CLEAR to Q
tw CLEAR pulse Width
tw CLOCK pulse Width
ts Setup Time D to CK
HIGH or LOW
th Hold Time D to CK
HIGH or LOW
tREM Recovery Time CLEAR
to CLOCK
fMAX Maximum Clock
Frequency
*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5V ± 0.5V
T est Con ditio n
VCC
(V)
3.3(*)
5.0(*)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
4.0 8.0 12.5 3.0 14.0
3.0 5.5 9.0 2.5 10.0
4.0 8.5 13.0 3.0 14.0
3.0 6.5 10.0 2.5 11.0
5.5 6.0
4.0 4.5
5.5 6.0
4.0 4.5
5.5 6.0
4.0 4.5
1.5 1.5
1.5 1.5
4.0 4.5
3.0 3.0
90 75
140 190
125
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Conditions
VCC
(V)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
Unit
CIN Input Capacitance
5.0
4 pF
CPD Power Dissipation
5.0 fIN = 10 MHz
Capacitance (note 1)
TBD
pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/n(per circuit)
5/10
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet 74AC273.PDF ] |
Número de pieza | Descripción | Fabricantes |
74AC273 | OCTAL D-TYPE FLIP FLOP WITH CLEAR | STMicroelectronics |
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74AC273B | OCTAL D-TYPE FLIP FLOP WITH CLEAR | STMicroelectronics |
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