74F161APC 반도체 회로 부품 판매점
Synchronous Presettable Binary Counter
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 National Semiconductor |
November 1994
54F 74F161A 54F 74F163A
Synchronous Presettable Binary Counter
General Description
The ’F161A and ’F163A are high-speed synchronous modu-
lo-16 binary counters They are synchronously presettable
for application in programmable dividers and have two types
of Count Enable inputs plus a Terminal Count output for
versatility in forming synchronous multi-stage counters The
’F161A has an asynchronous Master-Reset input that over-
rides all other inputs and forces the outputs LOW The
’F163A has a Synchronous Reset input that overrides
counting and parallel loading and allows the outputs to be
simultaneously reset on the rising edge of the clock The
’F161A and ’F163A are high-speed versions of the ’F161
and ’F163
Features
Y Synchronous counting and loading
Y High-speed synchronous expansion
Y Typical count frequency of 120 MHz
Y Guaranteed 4000V minimum ESD protection
Commercial
Military
Package
Number
Package Description
74F161APC
N16E
16-Lead (0 300 Wide) Molded Dual-In-Line
54F161ADM (Note 2) J16A
16-Lead Ceramic Dual-In-Line
74F161ASC (Note 1)
M16A
16-Lead (0 150 Wide) Molded Small Outline JEDEC
74F161ASJ (Note 1)
M16D
16-Lead (0 300 Wide) Molded Small Outline EIAJ
54F161AFM (Note 2) W16A
16-Lead Cerpack
54F161ALM (Note 2) E20A
20-Lead Ceramic Leadless Chip Carrier Type C
74F163APC
N16E
16-Lead (0 300 Wide) Molded Dual-In-Line
54F163ADM (Note 2) J16A
16-Lead Ceramic Dual-In-Line
74F163ASC (Note 1)
M16A
16-Lead (0 150 Wide) Molded Small Outline JEDEC
74F163ASJ (Note 1)
M16D
16-Lead (0 300 Wide) Molded Small Outline EIAJ
54F163AFM (Note 2) W16A
16-Lead Cerpack
54F163ALM (Note 2) E20A
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Connection Diagrams
Pin Assignment
for DIP SOIC and Flatpak
’F161A
Pin Assignment
for LCC
’F161A
Pin Assignment
for DIP SOIC and Flatpak
’F163A
Pin Assignment
for LCC
’F163A
TL F 9486–1
TL F 9486 – 2
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9486
TL F 9486 – 7
TL F 9486 – 8
RRD-B30M75 Printed in U S A
Logic Symbols
’F161A
IEEE IEC
’F161A
TL F 9486–3
’F163A
IEEE IEC
’F163A
TL F 9486 – 9
Unit Loading Fan Out
TL F 9486–6
Pin Names
CEP
CET
CP
MR (’F161A)
SR (’F163A)
P0 – P3
PE
Q0 – Q3
TC
Description
Count Enable Parallel Input
Count Enable Trickle Input
Clock Pulse Input (Active Rising Edge)
Asynchronous Master Reset Input (Active LOW)
Synchronous Reset Input (Active LOW)
Parallel Data Inputs
Parallel Enable Input (Active LOW)
Flip-Flop Outputs
Terminal Count Output
TL F 9486 – 10
54F 74F
UL
HIGH LOW
10 10
10 20
10 10
10 10
10 20
10 10
10 20
50 33 3
50 33 3
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b1 2 mA
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b1 2 mA
20 mA b0 6 mA
20 mA b1 2 mA
b1 mA 20 mA
b1 mA 20 mA
2
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