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PDF 74F14 Data sheet ( Hoja de datos )
| Número de pieza | 74F14 | |
| Descripción | 8-Line to 3-Line Priority Encoder | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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March 1988
Revised July 1999
74F14
Hex Inverter Schmitt Trigger
General Description
The 74F14 contains six logic inverters which accept stan-
dard TTL input signals and provide standard TTL output
levels. They are capable of transforming slowly changing
input signals into sharply defined, jitter-free output signals.
In addition, they have a greater noise margin than conven-
tional inverters.
Each circuit contains a Schmitt trigger followed by a Dar-
lington level shifter and a phase splitter driving a TTL
totem-pole output. The Schmitt trigger uses positive feed
back to effectively speed-up slow input transition, and pro-
vide different input threshold voltages for positive and neg-
ative-going transitions. This hysteresis between the
positive-going and negative-going input thresholds (typi-
cally 800 mV) is determined internally by resistor ratios and
is essentially insensitive to temperature and supply voltage
variations.
Ordering Code:
Order Number Package Number
Package Description
74F14SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F14SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F14PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
U.L.
Input IIH/IIL
Pin Names Description
HIGH/LOW Output IOH/IOL
In
Input
1.0/1.0 20 µA/−0.6 mA
On
Output
50/33.3 −1 mA/20 mA
Function Table
Input
A
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
Output
O
H
L
© 1999 Fairchild Semiconductor Corporation DS009461
www.fairchildsemi.com
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet 74F14.PDF ] | |
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